专利名称：Register bank circuit
发明人：Yoshida, Kazuyoshi, c/o Intellectual Property Div.,Itoh, Hiroshi, c/o Intellectual Property
Div.,Fukuoka, Hiroshi, c/o Intellectual
Property Div.,Shinohara, Makoto, Intellectual
Property Division
申请号：EP90100596.7
申请日：19900112
公开号：EP0381940A1
公开日：
19900816
专利内容由知识产权出版社提供
专利附图：register for
摘要：A semiconductor device including a register bank circuit comprises register array means (51) for storing data, said register array means having a matrix structure which is formed of a plurality of banks (BJ) arranged in a row of the matrix structure and a plura l ity of registers (RK) arranged in a column thereof, bank selector means (53, 54) for selecting one (e.g., B1) of said banks (BJ) while the one to be selected is specified, register selector means (55, 56) for selecting one (e.g., R2) of said registers (RK) in the one bank (B1) selected by said bank selector means (54), so that the selected register (R2) is coupled to a bus (57).
申请人：KABUSHIKI KAISHA TOSHIBA,TOSHIBA MICRO-ELECTRONICS CORPORATION 地址：72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210 JP,25-1, Ekimaehoncho Kawasaki-ku, Kawasaki-shi JP
国籍：JP,JP
代理机构：Lehn, Werner, Dipl.-Ing.
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