1
Features
•Serial Peripheral Interface (SPI) Compatible •Supports SPI Modes 0 (0,0) and 3 (1,1)–Data Sheet Describes Mode 0 Operation
•Medium-voltage and Standard-voltage Operation –2.7 (V CC  = 2.7V to 5.5V)
•Extended Temperature Range −40°C to +125°C •  5.0 MHz Clock Rate •8-byte Page Mode
•Block Write Protection
–Protect 1/4, 1/2, or Entire Array
•Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
•Self-timed Write Cycle (10 ms max)•High Reliability
–Endurance: One Million Write Cycles –Data Retention: 100 Years
•
8-lead JEDEC SOIC and 8-lead TSSOP Packages
toggle rateDescription
The AT25010A/020A/040A provides 1024/2048/4096 bits of serial electrically-eras-able programmable read-only memory (EEPROM) organized as 128/256/512 words of 8 bits each. The device is optimized for use in many automotive applications where low-power and low-voltage operation are essential. The AT25010A/020A/040A is available in space-saving 8-lead JEDEC SOIC and 8-lead TSSOP packages.The AT25010A/020A/040A is enabled through the Chip Select pin (CS) and accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO),and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate erase cycle is required before write.
Block write protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable instructions the WP pin to protect against inadvertent write attempts. The HOLD pin may be used Table 1.  Pin Configurations
Pin Name Function CS Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground VCC Power Supply WP Write Protect HOLD
Suspends Serial Input
BDTIC  www.bdtic/ATMEL
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AT25010A/020A/040A
5087D–SEEPR–3/07
Figure 1.  Block Diagram
Absolute Maximum Ratings*
Operating T emperature ......................................−55°C to +125°C *NOTICE:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Storage T emperature .........................................−65°C to +150°C Voltage on Any Pin
with Respect to Ground ........................................−1.0V to +7.0V Maximum Operating Voltage ..........................................6.25V DC
5.0 mA
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AT25010A/020A/040A
5087D–SEEPR–3/07
Table 2.  Pin Capacitance (1)
Note:
1.This parameter is characterized and is not 100% tested.
Table 3.  DC Characteristics
Applicable over recommended operating range from: T A  = −40°C to +125°C. V CC  = +2.7V to +5.5V
Note:
1.Worst case measured at 125°C
2.V IL  min and V IH  max are reference only and are not tested.
Applicable over recommended operating range from T A  = 25°C, f = 1.0 MHz, V CC  = +5.0V (unless otherwise noted)
Symbol Test Conditions Max Units Conditions C OUT Output Capacitance (SO)
8pF V OUT  = 0V C IN Input Capacitance (CS, SCK, SI, WP , HOLD)
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pF
V IN  = 0V
Symbol Parameter Test Condition
Min Max Units V CC1Supply Voltage    2.7
5.5V I CC1Supply Current V CC  = 5.0V at 1 MHz, SO = Open, Read    3.0mA I CC2Supply Current V CC  = 5.0V at 2 MHz, SO = Open,Read, Write
6.0mA I CC3Supply Current V CC  = 5.0V at 5 MHz, SO = Open,Read, Write    6.0mA I SB1(1)Standby Current V CC  = 2.7V CS = V CC    3.0µA I SB2(1)Standby Current V CC  = 5.0V CS = V CC
5.0µA I IL Input Leakage V IN  = 0V to V CC  −0.6  3.0µA I OL Output Leakage V IN  = 0V to V CC
−0.6  3.0µA V IL (2)Input Low Voltage −0.6V CC x 0.3V V IH (2)Input High Voltage V CC  x 0.7
V CC  + 0.5V V OL1Output Low Voltage    3.6V ≤ V CC  ≤ 5.5V
I OL  = 2.0 mA 0.4
V V OH1Output High Voltage I OH  = −1.0 mA V CC  – 0.8
V V OL2Output Low Voltage    2.7V ≤ V CC  ≤ 3.6V
I OL  = 0.15 mA 0.2
V V OH2Output High Voltage
I OH  = −100 µA
V CC  – 0.2V
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AT25010A/020A/040A
5087D–SEEPR–3/07
Note:
1.This parameter is characterized and is not 100% tested.
Table 4.  AC Characteristics
Applicable over recommended operating range from T A  = −40°C to +125°C, V CC  = As Specified,C
L = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
Parameter
Voltage Min Max Units f SCK SCK Clock Frequency    2.7–5.50
5.0MHz t RI Input Rise Time    2.7–5.52µs t FI Input Fall Time    2.7–5.52
µs t WH SCK High Time    2.7–5.540ns t WL SCK Low Time    2.7–5.540ns t CS CS High Time    2.7–5.580ns t CSS CS Setup Time    2.7–5.580
ns t CSH  CS Hold Time    2.7–5.580ns t SU  Data In Setup Time    2.7–5.55ns t H Data In Hold Time    2.7–5.520ns
t HD  Hold Setup Time    2.7–5.540t CD Hold Hold Time    2.7–5.540ns t V Output Valid    2.7–5.5040
ns t HO Output Hold Time    2.7–5.50ns t LZ
Hold to Output Low Z    2.7–5.50
40ns t HZ Hold to Output High Z    2.7–5.580ns t DIS Output Disable Time    2.7–5.580ns t WC
Write Cycle Time    2.7–5.5
5ms Endurance (1)  5.0V , 25°C, Page Mode
1M Write Cycles
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AT25010A/020A/040A
5087D–SEEPR–3/07
Serial Interface Description
MASTER: The device that generates the serial clock.
S L AV E : B e c a u s e  t h e  s e r i a l  c l o c k  p i n  (S C K ) i s  a l w a y s  a n  i n p u t , t h e AT2
5010A/020A/040A always operates as a slave.
TRANSMITTER/RECEIVER: The AT25010A/020A/040A has separate pins designated for data transmission (SO) and reception (SI).
MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.
SERIAL OP-CODE: After the device is selected with CS going low, the first byte will be received. This byte contains the op-code that defines the operations to be performed.The op-code also contains address bit A8 in both the Read and Write instructions.INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT25010A/020A/040A, and the serial output pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication.
CHIP SELECT: The AT25010A/020A/040A is selected when the CS pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain in a high impedance state.
HOLD: The HOLD pin is used in conjunction with the CS pin to select the AT25010A/020A/040A. Wh
en the device is selected and a serial sequence is underway,HOLD can be used to pause the serial communication with the master device without resetting the serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low. To resume serial communication, the HOLD pin is brought high while the SCK pin is low (SCK may still toggle during HOLD). Inputs to the SI pin will be ignored while the SO pin is in the high impedance state.
WRITE PROTECT: The write protect pin (WP) will allow normal read/write operations when held high. When the WP pin is brought low, all write operations are inhibited. WP going low while CS is still low will interrupt a write to the AT25010A/020A/040A. If the internal write cycle has already been initiated, WP going low will have no effect on any write operation.

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