专利名称：Method and system for reducing data errors in digital communications
valid from是什么意思
发明人：PHILLIP K. FREYMAN
申请号：AU2091801
申请日：20001213
公开号：AU2091801A
公开日：
20010618
专利内容由知识产权出版社提供
摘要：A system (10) for reducing data errors in a digital data stream includes a receiver (122), an error detection circuit (123), and a processor (100). One or more communication channels transmit redundant data slots to the receiver (122). In response to the redundant data slots, the error detection circuit (123) generates data valid signals corresponding to the communication channels. The data valid signals are set based on the contents of the redundant data slots. In response to the data valid signals from the error detection circuit (123), the processor (100) generates a non-redundant data stream including data slots selected from either of the incoming communication channels. In this manner, corrupted data slots can be removed, resulting in an output non-redundant data stream having fewer data errors.
申请人：MOTOROLA, INC.
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