Ultra-Low Power Single-Chip USB 2.0 to 10/100M Ethernet Controller
General Description
The Supereal SR9900 10/100M Ethernet controller combines an IEEE 802.3u compliant Media Access Controller (MAC), USB bus controller, and embedded memory. A linear regulator (LDO) is incorporated for reduced BOM cost.
With state-of-the-art DSP technology and mixed-mode signal technology, the SR9900 offers high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection and Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capabilities. The SR9900 features embedded One-Time-Programmable (OTP) memory.
Advanced Configuration Power management Interface (ACPI)—power management for modern operating systems that are capable of Operating System-directed Power Management (OSPM)—is supported to achieve the most efficient power management possible. In addition to the ACPI feature, remote wake-up (including AMD Magic Packet and Microsoft Wake-Up Frame) is supported in both ACPI and APM (Advanced Power Management) environments.
The SR9900 supports Microsoft Wake Packet Detection (WPD) to provide Wake-Up Frame information to the OS,
<, PatternID, OriginalPacketSize, SavedPacketSize, SavedPacketOffset, etc. WPD helps prevent unwanted/
unauthorized wake-up of a sleeping computer.
The SR9900 is fully compliant with Microsoft NDIS5, NDIS6 (IPv4, IPv6, TCP, UDP) Checksum features, and supports IEEE 802 IP Layer 2 priority encoding and IEEE 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation on a network server.
The SR9900 supports Protocol offload. It offloads some of the most common protocols to NIC hardware in order to prevent spurious  wake-up and further reduce power  consumption. The SR9900 can offload ARP (IPv4) and NS (IPv6) protocols while in the D3 power saving state.
The SR9900 supports IEEE 802.3az-2010, also known as Energy Efficient Ethernet (EEE). IEEE 802.3az operates with the IEEE 802.3 Media Access Control (MAC) Sublayer to support operation in L
ow Power Idle mode. When the Ethernet network is in low link utilization, EEE allows systems on both sides of the link to save power.
The SR9900 also features USB 2.0 technology. It provides higher bandwidth and improved protocols for data exchange between the host and the device. In addition, USB 2.0 offers a more aggressive power management feature that enables selective suspend to save energy.
The SR9900 is suitable for multiple market segments and emerging applications, such as desktop, mobile,
workstation, server, communications platforms, docking station, and embedded applications.
Features
●Supports USB 2.0 and 1.1
●Integrated 10/100M transceiver
⏹Supports Full Duplex flow control (IEEE
802.3x)
⏹Fully compliant with IEEE 802.3, IEEE
802.3u
⏹Supports IEEE 802.1P Layer 2 Priority
Encoding
⏹Supports IEEE 802.1Q VLAN tagging
⏹Supports IEEE 802.3az-2010 (EEE)
⏹Auto-Negotiation with Next Page
capability
●Microsoft AOAC (Always On Always
Connected)
⏹Supports Wake-Up Frame pattern exact
matching
⏹Supports link change wake up
⏹Supports Microsoft WPD (Wake Packet
⏹Detection)
⏹Supports Protocol Offload (ARP & NS) ●Microsoft NDIS5, NDIS6 Checksum Offload
(IPv4, IPv6, TCP, UDP) and Segmentation
Task-offload (Large send v1 and Large send
v2) support
●Supports pair swap/polarity/skew correction ●Crossover Detection & Auto-Correction
●Standard for sleeping hosts (see note 1)
●XTAL-Less Wake-On-LAN
●Supports 25MHz external clock (from
oscillator or system clock source)
●Supports power down/link down power
saving
●Transmit/Receive on-chip buffer support
●Embedded OTP memory
●Low power supply 1.2V 3.3V and 5.0V; 1.2V
and 3.3V are generated by internal linear
regulator (LDO)
●Supports Customizable LEDs
●Controllable LED Blinking Frequency and
Duty Cycle
●Supports hardware CRC (Cyclic Redund-
ancy Check) function
●LAN disable with GPIO pin
●Supports LPM (Link Power Management) ●SPI Flash Interface
●Supports CDC-ECM
●24-pin QFN ‘Green’ package
●0.11µm CMOS process
Application
●USB Dongle
●Network Printer
●Card Reader for payment
●Docking Station
●Port Replicator for Mobile Computer
●Internet Security USB Key
●Media Gateway
●Pocketable Computer
●Portable Media Player
●TiVo Box
●Game Console
●IP STB
●DVD-Recorder/DVR
●IPTV
Block Diagram
Figure 1. Block Diagram
Pin Assignment
A V D D 33
M D I +[0]
U 2G N D
LANWAKEB
RSET
AVDD12XTAL2U2DP S P I S D I
L E D 1/S P I S C K
D V D D 12
L E D 0/S P I C S B G P I O
D V D D 33
M D I -[1]
M D I +[1]
M D I -[0]
U2DM
XTAL1SPISDO DVDD12AVDD33VDD5DVDD12_UPSnegotiation auto
Figure2. Pin Assignments
Pin Descriptions
I=Input, O=Output, IO= Bi-directional input and output, P=Power

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