Altera Remote Update IP Core User Guide
The Altera Remote Update IP core implements a remote system update using dedicated remote system
upgrade circuitry available in supported devices.
Remote system update helps you deliver feature enhancements and bug fixes without recalling your
product, and reduces time-to-market and extends product life. The Altera Remote Update IP core
downloads a new configuration image from a remote location, stores the image in a configuration device, and upgrades the configuration circuitry to start a reconfiguration cycle.
The dedicated circuitry performs error detection during and after the configuration process. When the
dedicated circuitry detects errors, the circuitry facilitates system recovery by reverting back to a safe,
default factory configuration image and then provides error status information.
The following figure shows a functional diagram for a typical remote system update process.
Figure 1: Typical Remote System Update Process
Note:Altera recommends you to use 20–MHz f MAX for all devices.
Related Information
•Configuration Center
•ALTREMOTE_UPDATE Knowledge Base
Installing and Licensing IP Cores
The Altera IP Library provides many useful IP core functions for production use without purchasing an
additional license. You can evaluate any Altera® IP core in simulation and compilation in the Quartus® II software using the OpenCore® evaluation feature. Some Altera IP cores, such as MegaCore® functions,
require that you purchase a separate license for production use. You can use the OpenCore Plus feature to evaluate IP that requires purchase of an additional license until you are satisfied with the functionality and performance. After you purchase a license, visit the Self Service Licensing Center to obtain a license
number for any Altera product.
© 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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101 Innovation Drive, San Jose, CA 95134
Figure 2: IP Core Installation Path
Contains the Quartus II software
Contains the Altera IP Library source code <IP core name> - Contains the IP core source files
Note:The default IP installation directory on Windows is <drive>:\altera\<version number>; on Linux it is
<home directory>/altera/ <version number>.
Related Information
•Altera Licensing Site
•Altera Software Installation and Licensing Manual
Customizing and Generating IP Cores
You can customize IP cores to support a wide variety of applications. The Quartus II IP Catalog and parameter editor allow you to quickly select and configure IP core ports, features, and output files.
IP Catalog and Parameter Editor
The Quartus II IP Catalog (Tools  > IP Catalog ) and parameter editor help you easily customize and
integrate IP cores into your project. You can use the IP Catalog and parameter editor to select, customize,and generate files representing your custom IP variation.
Note:The IP Catalog (Tools  > IP Catalog) and parameter editor replace the MegaWizard ™
Plug-In
Manager for IP selection and parameterization, beginning in Quartus II software version 14.0. Use the IP Catalog and parameter editor to locate and paramaterize Altera IP cores.The IP Catalog lists IP cores available for your design. Double-click any IP core to launch the parameter editor and generate files representing your IP variation. The parameter editor prompts you to specify an IP variation name, optional ports, and output file generation options. The parameter editor generates a top-level Qsys system file (.qsys ) or Quartus II IP file (.qip ) representing the IP core in your project. You can also parameterize an IP variation without an open project.
Use the following features to help you quickly locate and select an IP core:
•Filter IP Catalog to Show IP for active device family  or Show IP for all device families .
•Search to locate any full or partial IP core name in IP Catalog. Click Search for Partner IP , to access partner IP information on the Altera website.
•Right-click an IP core name in IP Catalog to display details about supported devices, open the IP core's installation folder, andor view links to documentation.
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Figure 3: Quartus II IP Catalog
Search and filter IP for your target device
Double-click to customize, right-click for information
Note:The IP Catalog is also available in Qsys (View  > IP Catalog). The Qsys IP Catalog includes
exclusive system interconnect, video and image processing, and other system-level IP that are not available in the Quartus II IP Catalog. For more information about using the Qsys IP Catalog, refer to Creating a System with Qsys  in the Quartus II Handbook .
Using the Parameter Editor
The parameter editor helps you to configure IP core ports, parameters, and output file generation options.
•Use preset settings in the parameter editor (where provided) to instantly apply preset parameter values for specific applications.
•View port and parameter descriptions, and links to documentation.•Generate testbench systems or example designs (where provided).
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Figure 4: IP Parameter Editors
View IP port and parameter details
Apply preset parameters for specific applications
Specify your IP variation name
and target device Legacy parameter editors
Specifying IP Core Parameters and Options
The parameter editor GUI allows you to quickly configure your custom IP variation. Use the following steps to specify IP core options and parameters in the Quartus II software. Refer to Specifying IP Core Parameters and Options (Legacy Parameter Editors) for configuration of IP cores using the legacy parameter editor.
1.In the IP Catalog (Tools  > IP Catalog ), locate and double-click the name of the IP core to customize.The parameter editor appears.
2.Specify a top-level name for your custom IP variation. The parameter editor saves the IP variation settings in a file named <your_ip>.qsys . Click OK .
3.Specify the parameters and options for your IP variation in the parameter editor, including one or more of the following. Refer to your IP core user guide for information about specific IP core parameters.•Optionally select preset parameter values if provided for your IP core. Presets specify initial parameter values for specific applications.
电脑软件editor•Specify parameters defining the IP core functionality, port configurations, and device-specific features.
•Specify options for processing the IP core files in other EDA tools.4.Click Generate HDL , the Generation  dialog box appears.
5.Specify output file generation options, and then click Generate . The IP variation files generate according to your specifications.
6.To generate a simulation testbench, click Generate  > Generate Testbench System .
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7.
To generate an HDL instantiation template that you can copy and paste into your text editor, click Generate  > HDL Example
.
8.Click
Finish . The parameter editor adds the top-level .qsys  file to the current project automatically. If you are prompted to manually add the .qsys  file to the project, click Project  > Add/Remove Files in Project  to add the file.
9.After generating and instantiating your IP variation, make appropriate pin assignments to connect ports.Figure 5: IP Parameter Editor
View IP port and parameter details
Apply preset parameters for specific applications
Specify your IP variation name and target device Upgrading IP Cores
IP core variants generated with a previous version of the Quartus II software may require upgrading before use in the current version of the Quartus II software. Click Project  > Upgrade IP Components  to identify and upgrade IP core variants.
The Upgrade IP Components  dialog box provides instructions when IP upgrade is required, optional, or unsupported for specific IP cores in your design. You must upgrade IP cores that require it before you can compile the IP variation in the current version of the Quartus II software. Many Altera IP cores
support automatic upgrade.
The upgrade process renames and preserves the existing variation file (.v , .sv , or .vhd ) as <my_variant>_BAK.v , .sv , .vhd  in the project directory.
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