外文资料翻译
The 10-bit CMOS ADC (Analog to Digital Converter) is a recycling type device with 8-channel analog inputs. It converts the analog input signal into 10-bit binary codes at a maximum conversion rate of 500KSPS with 205MHZ A/D converter clock. A/D converter operates with on-chip sample-and-hold function and power down node is supported.
The LCD controller in the S3C2440 consists of the logic for transferring LCD image data from a video buffer located in system memory to an external LCD driver.
The LCD controller supports monochrome,2-bit per pixel(4-level gray scale) or 4-bit per pixel (16-level gray scale) mode on a monochrome LCD,using a time-based dithering algorithm and Frame Rate Control (FRC) method and it can be interfaced with a color LCD panel at 8-bit per pixel (256-level color) and 12-bit per pixel (4096-level color) for interfacing with STN LCD.
The LCD controller can be programmed to support different requirements on the screen related to the number of horizontal and vertical pixels, data line width for the data interface, interface timing and refresh rate.
FEATURES
TFT LCD Displays:
Supports 1,2,4 or 8-bpp (bit per pixel) palletized color displays for TFT
Supports 16,24-bpp non-palletized true-color displays for color TFT
Supports maximum 16M color TFT at 24bit per pixel mode
Supports multiple screen size
Typical actual screen size: 640 * 480 , 320 * 240 , 160 * 160 , and others
Maximum virtual screen size is 4Mbytes
Maximum virtual screen size in 64K color mode : 2048*1024 and others
中文翻译英文转换器A/D converter classification：
1. The integral type (such as TLC7135)
Integral type AD work principle is the input voltage will convert time (pulse width signal) or frequency
(pulse frequency), and then by the timer/counter get digital value. Its advantage is to use a simple circuit can get high resolution, but shortcomings due to a conversion precision dependent on integral time, so the conversion rate is extremely low. At the early stage of the monolithic AD converter is used mostly integral type, now compare successive type has gradually become the mainstream.
2. Compare two successive type (such as TLC0831)
Successive type AD by a comparison is used and DA converter through successive more logical structure, from the MSB began, in order to every will input voltage and built-in DA converter output carries on the comparison, the n times
comparison and the numerical value of output. The circuit of the scale to belong to medium. Its advantage is high speed, low power consumption, low resolution (<12 a) cheap, but high precision (> twelve) price is very high.
3. Parallel comparison of type/parallel comparison type (such as TLC5510)
Parallel comparison with multiple comparator type AD, only for a comparison of the conversion, also called flash (fast) type. Due to the conversion rate is extremely high, n a conversion to need 2 n-a co
mparator and, therefore, the size of a circuit, the price is high, only applies to the video AD converter, particularly high speed of the field. String of parallel comparison between parallel structure type AD on the type and successive comparison between type, the most typical is by 2 n/two parallel type AD converter with DA converter component, with two times the better implement conversion, so called Half flash (Half a fast) type. And into three steps or more steps called AD transform realize classification (Multistep/Subrangling) type AD, and from a conversion timing Angle can also be called as the assembly line (Pipelined) type AD and modern classification type in AD joining in the many transformations number operations and fixed the characteristics of the function. This kind of AD faster than successive type is high, circuit scale than parallel type small.
4. Σ-Δ modulated (such as AD7705)
Σ-Δ type AD by integrator, comparator, a DA converter and digital filters etc. In principle similar to integral type, the input voltage conversion to time (pulse width) signal, a digital filter to get digital value after the treatment. The digital circuit of the single chip basically easily, so easy to do high resolution. Mainly used for audio and measurement. 5. Capacitance array is successive type
Capacitance array type compare successive AD develops in the built-in DA converter capacitance m
atrix < baike.baidu/view/10337.htm > way, can also be called charge FenPeiXing again. The general resistor DA converters most resistance value must be consistent, in a single chip generate high precision of the resistor is not easy. If use capacitance array replace resistor, can be made with low cost high precision monolithic AD converter. Recent successive type AD converter is mostly for the capacitance array type.
Pressure frequency conversion type (such as AD650)
Pressure Frequency conversion model (V oltage-Frequency Converter) is through the indirect conversion way realization of conversion module. Its principle is first the input analog signal conversion into frequency, then use the counter will frequency converted into digital quantity. In theory this AD resolution can be almost unlimited increase, as long as the sampling time can meet the requirements of the output pulse frequency resolution cumulative number of width. Its advantage is high resolution, low power consumption, low price, but need to external counts circuit to complete the AD transform.
ARM9E-S as an example to introduce the main ARM9 processor structure and characteristics. Its main characteristics as follows: (1) 32 bit fixed-point RISC processors, improved ARM/Thumb code i
nterweave, enhance sexual on time-multiplier design. Support real-time (real-time) commissioning; (2) in the SRAM of instructions and data, and instructions and data storage capacity of adjustable; (3)
in high speed of instructions and data buffers (cache) from 4 K bytes capacity to 1 M bytes); (4) set protection unit (protection unit), very suitable for embedded application segment and memory protection; (5) the AMBA AHB bus interface for peripherals to provide a uniform address and data bus; (6) support external coprocessor, instructions and data bus have simple handshake signaling support; (7) support standard basic logic unit "baike.baidu/view/1520672.htm > scanning test methodology, and support BIST (built-in-self-test); (8) support embedded tracking macro unit, support real-time tracking instructions and data.
中文资料翻译
10位CMOS ADC （模数转换器）是一个8通道模拟输入的再循环类型设备。器转换模拟输入信号为10位二进制数字编码，最大转换率为2.5MHZ A/D转换器时钟下的500KSPS。A/D转换器支持片上采样保持功能和掉电模式的操作。
S3C2440中的LCD控制器由从位于系统存储器的视频帧缓冲区到外部LCD驱动器的转移LCD图像数据
逻辑组成。LCD控制器支持单LCD的单。2位每像素（4阶灰度）或4位每像素（16阶灰度）模式，通过使用基于时间的抖动算法和帧频控制（FRC）方法，其可以连接到8位没像素（256）的彩LCD面板和连接到12位每像素（4096）的STN LCD.
可以编程LCD控制器来支持不同涉及屏幕水平和垂直像素数，数据接口的数据线宽度，接口时序和刷新频率的需要。
TFT LCD显示：
支持 TFT的1、2、4、8bpp(位每像素)调显示
支持彩TFT的16、24bpp无调显示
支持24位每像素模式下最大16MTFT
支持多种屏幕尺寸
典型实际屏幕尺寸:640*480、320*240、160*160等
最大虚拟屏幕尺寸为4M字节
64K模式最大虚拟屏幕尺寸：  2048*1024等
A/D转换器的分类：
1.积分型（如TLC7135）
积分型AD工作原理是将输入电压转换成时间(脉冲宽度信号)或频率(脉冲频率)，然后由定时器/计数器获得数字值。其优点是用简单电路就能获得高分辨率，但缺点是由于转换精度依赖于积分时间，因此转换速率极低。初期的单片AD转换器大多采用积分型，现在逐次比较型已逐步成为主流。
2.逐次比较型（如TLC0831）
逐次比较型AD由一个比较器和DA转换器通过逐次比较逻辑构成，从MSB开始，顺序地对每一位将输入电压与内置DA转换器输出进行比较，经n次比较而输出数字值。其电路规模属于中等。其优点是速度较高、功耗低，在低分辩率（<12位）时价格便宜，但高精度（>12位）时价格很高。
3.并行比较型/串并行比较型（如TLC5510）
并行比较型AD采用多个比较器，仅作一次比较而实行转换，又称flash(快速)型。由于转换速率极高，n位的转换需要2n-1个比较器，因此电路规模也极大，价格也高，只适用于视频AD转换器等速度特别
高的领域。串并行比较型AD 结构上介于并行型和逐次比较型之间，最典型的是由2个n/2位的并行型AD转换器配合DA转换器组成，用两次比较实行转换，所以称为 Half flash(半快速)型。还有分成三步或多步实现AD转换的叫做分级（Multistep/Subrangling）型AD，而从转换时序角度又可称为流水线（Pipelined）型AD，现代的分级型AD 中还加入了对多次转换结果作数字运算而修正特性等功能。这类AD速度比逐次比较型高，电路规模比并行型小。
4.Σ-Δ调制型（如AD7705）
Σ-Δ型AD由积分器、比较器、1位DA转换器和数字滤波器等组成。原理上近似于积分型，将输入电压转换成时间(脉冲宽度)信号，用数字滤波器处理后
得到数字值。电路的数字部分基本上容易单片化，因此容易做到高分辨率。主要
用于音频和测量。            5.电容阵列逐次比较型
电容阵列逐次比较型AD在内置DA转换器中采用电容矩阵方式，也可称为电荷再分配型。一般的电阻阵列DA转换器中多数电阻的值必须一致，在单芯片上生成高精度的电阻并不容易。如果用电容阵列取代电阻阵列，可以用低廉成本制成高精度单片AD转换器。最近的逐次比较型AD转换器大多为电容阵列式的。
压频变换型（如AD650）
压频变换型（Voltage-Frequency Converter）是通过间接转换方式实现模数转换的。其原理是首先将输入的模拟信号转换成频率，然后用计数器将频率转换成数字量。从理论上讲这种AD的分辨率几乎可以无限增加，只要采样的时间能够满足输出频率分辨率要求的累积脉冲个数的宽度。其优点是分辩率高、功耗
低、价格低，但是需要外部计数电路共同完成AD转换。
以ARM9E-S为例介绍ARM9处理器的主要结构及其特点。其主要特点如下：(1)32bit定点RISC处理器，改进型ARM/Thumb代码交织，增强性乘法器设计。支持实时(real-time)调试；(2)片内指令和数据SRAM，而且指令和数据的存储器容量可调；(3)片内指令和数据高速缓冲器(cache)容量从4K字节到1M字节；
(4)设置保护单元(protection unit)，非常适合嵌入式应用中对存储器进行分段和保护；(5)采用AMBA AHB总线接口，为外设提供统一的地址和数据总线；(6)支持外部协处理器，指令和数据总线有简单的握手信令支持；(7)支持标准基本逻辑单元扫描测试方法学，而且支持BIST(built-in-self-test)；(8)支持嵌入式跟踪宏单元，支持实时跟踪指令和数据。

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