[转载]DC中target_library和link_library的区别
原⽂地址：DC中target_library和link_library的区别作者：红贺
Synthesis只⽤target library，不⽤link library；
link library⼀般可以放算法库和设计库等，⽐如DW；target library放的是⼯艺库。
target library 是你的综合⽬的库，存放的是你索要映射的逻辑单元。⼀般为standard cell library & io cell library 的typ⽽link library⼀般为宏单元等其他库。
“⽬标库（targe_library）：是DC在mapping时将设计映射到特定⼯艺所使⽤的库，就是使⽤⽬标库中的元件综合成设计的门级⽹表。
连接库（link_library）：是提供门级⽹表实例化的基本单元，也就是门级⽹表实例化的元件或单元都来⾃该库。连接库定义为标准单元的db格式的库⽂件加上pad db格式的库⽂件，加上ROM，RAM等宏单元库⽂件”
“简单地讲，所有⽤到的库都要放到link_library，因为DC⾃动到那⾥去。只有作综合⽤的库放在target_library，象ROM,PAD 等不⽤synthesis的就不要放进去了。”
DC⽤户⼿册中的说法：
Target Library
Design Compiler uses the target library to build a circuit. During mapping, Design Compiler
selects functionally correct gates from the target library. It also calculates the timing of the
circuit, using the vendor-supplied timing data for these gates.
Use the  target_library variable to specify the target library.
The syntax is
set target_library my_tech.db
Link Library
Design Compiler uses the link library to resolve references. For a design to be complete, it
must connect to all the library components and designs it references. This process is called
linking the design or resolving references.
During the linking process, Design Compiler uses the link_library  system variable, the
local_link_library attribute, and the  search_path system variable to resolve
references. These variables and attribute are described below:
link_library variable
The link_library variable specifies a list of libraries and design files that Design
Compiler can use to resolve references. When you load a design into memory, Design
Compiler also loads all li braries specified in the link_library variable.
Because the tool loads the libraries while loading the design, rather than during the link
process, the memory usage and runtime requir ed for loading the design might increase.
However, the advantage is that you know immediately whether your design can be
processed with the available memory.
An asterisk in the value of the link_library variable specifies that Design Compiler
should search memory for the reference.
• local_link_library  attribute
The local_link_library  attribute is a list of design files and libraries added to the
beginning of the link_library variable during the linki ng process. Design Compiler
searches files in the local_link_library  attribute first when it resolves references.
• search_path variable
If Design Compiler does not find the reference in  the link libraries, it searches in the
directories specified by the search_path  variable, described in  “Specifying a Library
Search Path” on page 4-7. For more information on resolving references, see  “Linking
Designs” on page 5-13.
The syntax is
set link_library {* my_tech.db}
Note that you specify the same value for the target library and the link library (except when
you are performing technology translation).
When you specify the files in the link_library variable, consider that Design Compiler
searches these files from left to right when it resolves references, and it stops searching
when it finds a reference. If you specify the link library as {"*" lsi_10k.db}, the designs in
memory are searched before the lsi_10k library.
Design Compiler uses the first technology library found in the link_library variable as
the main library. It uses the main library to obtain default values and settings used in the
sort of link
absence of explicit specifications for operating conditions, wire load selection group, wire
load mode, and net delay calculation. Design Compiler obtains the following default values
and settings from the main library:
• Unit definitions
• Operating conditions
简单来说link library就是解决实例化引⽤的，如果实例化的就是⼀个与⾮门，DC就从target library中到，如果例化的是⼀个fifo，DC就从fifo的库中到，如果例化的是⼀个模块，DC就从内存中到，因为这个模块的代码在编译过程中已经读进内存中去了。

版权声明：本站内容均来自互联网，仅供演示用，请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系QQ:729038198，我们将在24小时内删除。