HIGH VOLTAGE RAIL UP TO 600 V
dV/dt IMMUNITY +- 50 V/nsec IN FULL  TEM-PERATURE RANGE
DRIVER CURRENT CAPABILITY:
400 mA SOURCE,
650 mA SINK
SWITCHING TIMES 50/30 nsec RISE/FALL WITH 1nF LOAD
CMOS/TTL SCHMITT TRIGGER INPUTS WITH HYSTERESIS AND PULL DOWN SHUT DOWN INPUT
DEAD TIME SETTING
UNDER VOLTAGE LOCK OUT
INTEGRATED BOOTSTRAP DIODE
CLAMPING ON Vcc
SO8/MINIDIP PACKAGES
DESCRIPTION
The L6384 is an high-voltage device, manufac-tured with the BCD"OFF-LINE" technology. It has an Half - Bridge Driver structure that enables to drive N Channel Power MOS or IGBT. The Upper (Floating) Section is enabled to work with voltage Rail up to 600V. The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices. Matched delays between Lower and Up-per Section simplify high frequency operation. Dead time setting can be readily accomplished by means of an external resistor.
May 2000®
LOGIC
UV
DETECTION
LEVEL
SHIFTER
R S
V CC
LVG
DRIVER V CC
IN DT/SD
V BOOT
HVG
DRIVER
HVG
H.V.
LOAD
OUT
LVG
GND
D97IN518A
DEAD
TIME
bootstrappedV CC
Idt
Vthi
BOOTSTRAP DRIVER
C BOOT
4
3
5
6
7
8
1
2
BLOCK DIAGRAM
SO8                                  Minidip
ORDERING NUMBERS:
L6384D                                    L6384
L6384 HIGH-VOLTAGE HALF BRIDGE DRIVER
1/10
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
Value Unit Vout Output Voltage -3 to Vboot -18V Vcc Supply Voltage (*)- 0.3 to 14.6
V Is Supply Current (*)
25mA Vboot Floating Supply Voltage -1 to 618V Vhvg Upper Gate Output Voltage -1 to Vboot V Vlvg Lower Gate Output Voltage -0.3 to Vcc +0.3V Vi Logic Input Voltage
-0.3 to Vcc +0.3V Vsd Shut Down/Dead Time Voltage -0.3 to Vcc +0.3
V dVout/dt Allowed Output Slew Rate
50V/ns Ptot Total Power Dissipation (Tj = 85 °C)750mW Tj Junction Temperature 150°C Ts
Storage Temperature
-50 to 150
°C
(*) The device has an internal Clamping Zener between GND and the Vcc pin, It must not be supplied by a Low Impedence Voltage Source.Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)
THERMAL DATA
Symbol Parameter
SO8Minidip Unit R th j-amb
Thermal Resistance Junction to Ambient
150
100
°C/W
PIN DESCRIPTION
N.Name Type Function
1IN I Logic Input: it is in phase with HVG and in opposition of phase with LGV. It is compatible to V CC  voltage. [Vil Max = 1.5V, Vih Min = 3.6V]
2Vcc I Supply input voltage: there is an internal clamp [Typ. 15.6V]
3
DT/SD
I
High impedance pin with two functionalities. When pulled lower than Vdt [Typ. 0.5V] the device is shut down. A voltage higher than Vdt sets the dead time between high side gate driver  and low side
gate driver. The dead time value can be set forcing a certain voltage level on the pin or connecting a resistor between pin 3 and ground.
Care must be taken to avoid below threshold spikes on pin 3 that can cause undesired shut down of the IC. For this reason the connection of the components between pin 3 and ground has to be as short as possible. This pin can not be left floating for the same reason.The pin has not be pulled through a low impedance to V CC , because of the drop on the current source that feeds Rdt. The operative range is: 270K ⋅ Idt, that allows a dt range of 0.4 - 3.1µs.4GND
Ground
IN V CC DT/SD GND
1324
LVG
VOUT HVG V BOOT 8765
D97IN519
PIN CONNECTION
RECOMMENDED OPERATING CONDITIONS
Symbol Pin Parameter
Test Condition
Min.Typ.
Max.Unit Vout 6Output Voltage Note1580V Vboot -Vout 8
Floating Supply Voltage Note1
17V fsw Switching Frequency HVG,LVG load CL = 1nF
400kHz Vcc 2
Supply Voltage
Vclamp V T j
Junction Temperature
-45
125
°C
Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
ELECTRICAL CHARACTERISTICS AC Operation (V CC  = 14.4V; Tj = 25°C)
Symbol Pin Parameter
Test Condition Min.
Typ.Max.
Unit ton    1 vs 5,7High/Low Side Driver
Turn-On Propagation Delay
Vout = 0V R dt  = 47k Ω
200+dt ns tonsd    3 vs 5,7Shut Down Input Propagation Delay 220
280ns toff
1 vs 5,7
High/Low Side Driver
Turn-Off Propagation Delay
Vout = 0V R dt  = 47k Ω250300ns Vout = 0V R dt  = 146k Ω200250ns Vout = 0V R dt  = 270k Ω170200ns tr 7,5Rise Time CL = 1000pF 70ns tf 7,5Fall Time
CL = 1000pF
30
ns
DC Operation (V CC  = 14.4V; Tj = 25°C)
Supply Voltage Section Vclamp 2Supply Voltage Clamping Is = 5mA
14.615.616.6V Vccth12Vcc UV Turn On Threshold 11.51212.5V Vccth2
2
Vcc UV Turn Off Threshold
9.5
10
10.5
V
N.Name Type Function
5
LVG
O
Low Side Driver Output: the output stage can deliver 400mA source and 650mA sink [Typ.Values].
The circuit guarantees 0.3V max on the pin (@ I sink  = 10mA) with V CC  > 3V and lower than the turn on threshold. This allows to omit the bleeder resistor connected between the gate and the source of the external mosfet normally used to hold the pin low; the gate driver ensures low impedance also in SD conditions.
6Vout O Upper Driver Floating Reference: layout care has to be taken to avoid below ground spikes on this pin.
7
HVG
O
High Side Driver Output: the output stage can deliver 400mA source and 650mA sink [Typ. Values].
The circuit gurantees 0.3V max between this pin and Vout (@ I sink  = 10mA) with V CC  > 3V and lower than the turn on threshold. This allows to omit the bleeder resistor connected between the gate and the source of the external mosfet normally used to hold the pin low;the gate driver ensures low impedance also in SD conditions.
8Vboot
Bootstrap Supply Voltage: it is the upper driver floating supply. The bootstrap capacitor connected between this pin and pin 6 can be fed by an internal structure named "bootstrap driver" (a patented structure). This structure can replace the external bootstrap diode.
PIN DESCRIPTION  (continued)
IN SD
HVG LVG
D99IN1017
Figure 1. Input/Output Timing Diagram
Symbol Pin Parameter
Test Condition
Min.
Typ.Max.Unit Vcchys 2Vcc UV Hysteresis
2V Iqccu
2
Undervoltage Quiescent Supply Current
Vcc ≤ 11V 150µA Iqcc 2Quiescent Current Vin = 0
380
500µA Bootstrapped supply Voltage Section Vboot 8
Bootstrap Supply Voltage 17
V IQBS Quiescent Current
Vout = Vboot; IN = HIGH 200µA ILK High Voltage Leakage Current VHVG = Vout = Vboot =600V
10
µA Rdson Bootstrap Driver on Resistance (*)Vcc ≥ 12.5V; IN = LOW 125ΩHigh/Low Side Driver
Iso 5,7Source Short Circuit  Current VIN = Vih (tp < 10µs)300400mA Isi Sink  Short Circuit Current
VIN = Vil (tp < 10µs)
500
650
mA Logic Inputs Vil 2,3
Low Level Logic Threshold Voltage    1.5
V Vih High Level Logic Threshold Voltage    3.6
V Iih High Level Logic Input Current VIN = 15V 5070µA Iil Low Level Logic Input Current VIN = 0V 1
µA Iref 3Dead Time Setting Current 28µA dt
3 vs 5,7Dead Time Setting Range (**)Rdt = 47k Rdt = 146Rdt = 270k
0.4
0.51.52.7  3.1
µs µs µs Vdt 3
Shutdown Threshold
0.5
V
(*) R DSON  is tested in the following way: R DSON  =
(V CC  − V CBOOT1) − (V CC  − V CBOOT2)I 1(V CC,V CBOOT1) − I 2(V CC ,V CBOOT2)
where I 1 is pin 8 current when V CBOOT  = V CBOOT1, I 2 when V CBOOT  = V CBOOT2
(**) Pin 3 is a high impedence pin. Therefore dt can be set also forcing a certain voltage V 3 on this pin. The dead time is the same obtained      with a Rdt if it is: Rdt ⋅ Iref  = V 3.
DC Operation  (continued)
BOOTSTRAP DRIVER
A bootstrap circuitry is needed to supply the high voltage section. This function is normally accom-plished by a high voltage fast recovery diode (fig.4a). In the L6384 a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low side driver (LVG), with in series a diode,as shown in fig. 4b
An internal charge pump (fig. 4b) provides the DMOS driving voltage .
The diode connected in series to the DMOS has been added to avoid undesirable turn on of it.CBOOT  selection and charging :
To choose the proper C BOOT  value the external MOS can be seen as an equivalent capacitor.This capacitor C EXT  is related to the MOS total gate charge :
C EXT  =
Q gate
V gate The ratio between the capacitors C EXT  and C BOOT is proportional to the cyclical voltage loss .It  has to be:
C BOOT >>>C EXT  e.g.: if  Q gate  is 30nC and V gate  is 10V, C EXT  is 3nF. With  C BOOT  = 100nF the drop  would be 300mV.
If HVG has to be supplied for a long time, the C BOOT  selection has to take into account also the leakage losses.
<: HVG steady state consumption is lower than 200µA, so if HVG T ON  is  5ms, C BOOT  has to supply 1µC to C EXT . This charge on a 1µF ca-
pacitor means a voltage drop of 1V.
The internal bootstrap driver gives great advan-tages: the external fast recovery diode can be avoided (it usually has great leakage current).This structure can work only if V OUT  is close to GND
(or lower) and  in the meanwhile the LVG is on. The charging time (T charge  ) of the C BOOT  is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor.The bootstrap driver introduces a voltage drop due to  the DMOS R DSON  (typical value: 125Ohm). At low frequency this drop can be ne-glected. Anyway  increasing the frequency  it must be taken in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
V drop  = I charge R dson  → V drop  =
Q gate
T charge
R dson
where Q gate  is the gate charge of the external power MOS, R dson  is the on resistance of the bootstrap DMOS, and T charge  is the charging time of the bootstrap capacitor.
For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap DMOS is about 1V, if the  T charge  is  5µs. In fact:
V drop  =
30nC
5µs
⋅ 125Ω ~ 0.8V V drop  has to be taken into account when the voltage drop on C BOOT  is calculated: if this drop is too high,or the circuit topology doesn’t allow a sufficient charging time, an external diode can be used.
For both high and low side buffers @25˚C Tamb
012345  C (nF)0
50100150
200
250time (nsec)Tr
D99IN1015
Tf
Figure 2. Typical Rise and Fall Times vs.
Load Capacitance
024********
V S (V)
10
102
103
104
Iq (µA)D99IN1016
Figure 3. Quiescent Current vs. Supply
Voltage

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