Google+百度の英文关键词
Single-Ended Input（单端）
差分（Fully-Differential Input）
伪差分（Pseudo-Differential Input） 单端输入&差分输入
输入信号均以共同的地线为基准.这种输入方法主要应用于输入信号电压较高(高于1V)，信号源到模拟输入硬件的导线较短(低于15ft)，且所有的输入信号共用一个基准地线.如果信号达不到这些标准，此时应该用差分输入.对于差分输入，每一个输入信号都有自有的基准地线；由于共模噪声可以被导线所消除，从而减小了噪声误差.
单端输入时，是判断信号与GND的电压差.
差分输入时，是判断两个信号线的电压差.
信号受干扰时，差分的两线会同时受影响，但电压差变化不大.(抗干扰性较佳)
而单端输入的一线变化时,GND不变，所以电压差变化较大.(抗干扰性较差)
差分信号和普通的单端信号走线相比，最明显的优势体现在以下三个方面：
a.抗干扰能力强，因为两根差分走线之间的耦合很好(最好相邻布线)，当外界存在噪声干扰时，几乎是同时被耦合到两条线上，而接收端关心的只是两信号的差值，所以外界的共模噪声可以被完全抵消。
b.能有效抑制EMI，同样的道理，由于两根信号的极性相反，他们对外辐射的电磁场可以相互抵消，耦合的越紧密，泄放到外界的电磁能量越少。
c.时序定位精确，由于差分信号的开关变化是位于两个信号的交点，而不像普通单端信号依靠高低两个阈值电压判断，因而受工艺，温度的影响小，能降低时序上的误差，同时也更适合于低幅度信号的电路。目前流行的LVDS（low voltage differential signaling）就是指这种小振幅差分信号技术。
当AD的输入信号只有一路时，为了更好地抑制共模噪声，我们可以采用差分输入方式。这就需要我们首先要将单端变成差分，可以用运放AD8138实现。
types是什么意思RS232C是单端输入，这样在输入中有干扰信号加到输入中就会影响输出，造成输出信号错误;RS485是差动输入，即两个输入端的电势差作为输入，有干扰信号的话也会在作差的时候减掉了，这样可以大大提高信号的抗干扰能力!!
伪差分输入（NI关于什么是伪差分输入的解释）
伪差分信号连接方式减小了噪声，并允许在仪器放大器的共模电压范围内与浮动信号连接.在伪差分模式下，信号与输入的正端连接，信号的参考地与输入的负端连接。伪差分输入减小了信号源与设备的参考地电位(地环流)不同所造成的影响，这提高了测量的精度。
伪差分输入与差分输入在减小地环流和噪声方面是非常相似的，不同的方面在于，差分输入模式下，负端输入是随时间变化的，而在伪差分模式下，负端输入一定仅仅是一个参考。描述伪差分的另外一种方式就是，输入仅仅在打破地的环流这个意义上是差分的，而参考信号(负端输入)不是作为传递信号的，而仅仅是为信号(正端输入)提供一个直流参考点。
问题是这样的，传感器输出的微弱信号大概在mv级别，传感器离数据采集卡有一段距离，如果直接传输的话，信噪比会很低，所以打算先进行放大后再传输，由于数据采集卡是差分输入的，而仪表放大器的输出是单端的，所以打算采用伪差分方式，即将输出信号接在数据采集卡上AD输入的V+，然后将Gnd连在AD输入的V-上。现在遇到了以下问题需要请教：
1.伪差分输入能有效抑制共模噪声吗？
能部分抑制。由于两线对“大地”阻抗不一致，所以抑制效果有限。
2.伪差分输入与差分输入相比有哪些优缺点？
既然是“伪装”的，原则上没有优点只有缺点。其缺点就是两线不对称，共模抑制效果有限。硬要凑一个优点的话，就是可以勉强将单端输出信号伪装成差分，效果比完全单端连接效果稍好一点（解决两端地的小范围浮动）。
3.在网上差了一些资料说伪差分只能抑制DC共模噪声，不能抑制AC共模噪声，可是什么是DC噪声和什么是AC噪声，这个问题我还没有整明白？请帮忙讲讲什么是DC噪声？什么是AC噪声？还有为什么伪差分输入不能有效抑制AC共模噪声？
由于伪差分输入中的一条线是信号源的地线，所以可以认为其为直流——DC，其上噪声称为DC噪声（或回路噪声）。而标准的差分输入原则上双线都是交流，其上噪声称为交流噪声（认为其地是稳定的）。此类说法并不标准，所以听过算数。
Maxim > App Notes > A/D and D/A Conversion/Sampling Circuits
Jun 14, 2002 Keywords: single-ended, signal conditioning, pseudo differential, fully differential, common mode rejection,
CMRR, noise, ADC, a/d, analog digital, analog to digital, converters, convertors
APPLICATION NOTE 1108
Understanding Single-Ended, Pseudo-Differential and Fully-Differential ADC Inputs
Abstract: Many of today's instrumentation and process control applications convert the analog output of a sensor for processing and/or storage using an analog-to-digital converter (ADC). For voltage input ADCs, three different input structure types exist: Single-Ended, Pseudo-Differential and Fully-Differential. This tutorial explains the differences, advantages and tradeoffs between the input types.
Many of today's electronic instruments rely on microcontrollers or digital signal processors (DSPs) to process real world, analog signals. Sensors convert a natural parameter, such as temperature or pressure, into a voltage or current. Analog-to-digital converters (ADCs, or A/D converters) convert the signal into digital form.
For voltage input ADCs, three different input structure types exist: Single-Ended, Pseudo-Differential and Fully-Differential.
The simplest solution is to select an ADC input structure that matches the sensor output. However, there are trade-offs with each structure that should be considered. In addition, if signal-conditioning cir
cuitry is used between the sensor and the ADC, this circuitry can affect the ADC input structure choice. Some ADCs are configurable, allowing selection between single-ended or pseudo-differential input structures (MAX186, MAX147) while others allow a choice between single-ended or fully-differential (MAX1298, MAX1286).
Fully-Differential Inputs
For maximum noise rejection, use fully-differential inputs. Figure 1 shows an example of a fully-differential ADC T/H input structure. During track mode, Csample(+) charges to [AIN(+) Ð V DD/2] and Csample(-) charges to [AIN(-) Ð V DD/2]. When the T/H switches to hold mode, Csample(+) and Csample(-) connect together in series, such that the voltage sample presented to the ADC is the difference of AIN(+) and AIN(-). The differential architecture in conjunction with acceptable input bandwidth in the T/H are key ingredients for good dynamic common-mode rejection.
Figure 1. Fully-differential T/H stage.
In noisy environments, it is possible that coupled-noise could cause the differential inputs to exceed the ADC's allowable input voltage range. For best performance, reduce the input signal range to ensure that the ADC input range is not exceeded.
Another key advantage of differential signals is the increased dynamic range. With power supplies dropping to 3.3V and lower, design engineers are looking for ways to achieve greater input dynamic range. In theory, given the same voltage range for single-ended and fully-differential inputs, the fully-differential inputs will have double the dynamic range (Figure 2). This is because the two differential inputs can be 180° out of phase, as shown in Figure 3.
Figure 2. Fully-differential mode - AIN(+) and AIN(-) - 180° out of phase.
Figure 3. Fully-differential modes vs. single-ended is doubling ADC dynamic range.
Another way to think about this is in relation to signal-to-noise ratio (SNR). The SNR is defined in terms of the ADC's full-scale input level and the minimum detectable signal:
The minimum detectable signal is typically limited by the noise floor. Since fully-differential inputs have 2 times the full-scale input voltage level and have superior DC and AC common-mode rejection (which manifest themselves as noise), SNR increases.
Floating Differential Inputs
Ideally, common-mode voltages beyond GND and V DD can exist in a differential system, provided that the differential voltage does not exceed the ADC input range. In practice, this is achievable only if the sensor and the ADC are isolated. In Figure 4's example, the voltages at AIN(+) and AIN(-) fall within the input range specified by the ADC, but a large common-mode voltage on the sensor output voltage forces the ADC inputs to exceed the maximum input voltage specification.
Figure 4. High common-mode voltage.

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