DESCRIPTION
The 3823 group is the 8-bit microcomputer based on the 740 fam-ily core technology.
The 3823 group has the LCD drive control circuit, an 8-channel A/ D converter, a serial interface, a watchdog timer, a ROM correc-tion function, and as additional functions.
The various microcomputers in the 3823 group include variations of internal memory size and packaging. For details, refer to the section on part numbering.
FEATURES
●Basic machine-language instructions (71)
●The minimum instruction 0.4 µs (at f(X IN) = 10 MHz, High-speed mode)
●Memory 16 K to 60 K .640 to 2560 bytes ●ROM .32 bytes ✕ 2 blocks ●8-bit ✕ 1●Programmable input/output ports.. (49)
●Input ports (5)
●Software pull-up/pull-down resistors (Ports P0-P7 except port P40)●17 sources, 16 vectors
(includes key input interrupt)●Key Input Interrupt (Key-on Wake-Up) (8)
●8-bit ✕ 3, 16-bit ✕ 2●8-bit ✕ 1 (UART or Clock-synchronized)●A/10-bit ✕ 8 channels or 8-bit ✕ 8 channels ●LCD drive control 1/2, 1/1/2, 1/3, 1/4 Common output.. (4)
Segment output (32)
●Main clock Built-in feedback resistor
(connect to external ceramic resonator or quartz-crystal oscillator)●Sub-clock generating circuits
(connect to external quartz-crystal oscillator or on-chip oscillator)●Power source voltage
In frequency/2 mode (f(X IN)  ≤ 10 MHz)...................4.5 to 5.5 V In frequency/2 mode (f(X IN)  ≤ 8 MHz).....................4.0 to 5.5 V In frequency/4 mode (f(X IN)  ≤ 10 MHz)...................2.5 to 5.5 V In frequency/4 mode (f(X IN)  ≤ 8 MHz).....................2.0 to 5.5 V In frequency/4 mode (f(X IN)  ≤ 5 MHz).....................1.8 to 5.5 V In frequency/8 mode (f(X IN)  ≤ 10 MHz)...................2.5 to 5.5 V In frequency/8 mode (f(X IN)  ≤ 8 MHz).....................2.0 to 5.5 V In frequency/8 mode (f(X IN)  ≤ 5 MHz).....................1.8 to 5.5 V In 1.8 to 5.5 V ●Power dissipation
In frequency/18 mW (std.) (at f(X IN) = 8 MHz, Vcc = 5 V, Ta = 25 °C)
In low-speed mode at 18 µW (std.) (at f(X IN) stopped, f(X CIN) = 32 kHz, Vcc = 2.5 V, Ta = 25 °C)
In low-speed mode at 35 µW (std.)  (at f(X IN) stopped, f(X CIN) = stopped, Vcc = 2.5 V, Ta = 25 °C)
●Operating – 20 to 85 °C APPLICATIONS
Camera, audio equipment, household appliances, consumer elec-tronics, etc.
3823 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER REJ03B0146-0202
Rev.2.02
Jun.19.2007
Table 1 Performance overview
Parameter
71
0.4 µs (Minimum instruction, f(X IN ) 10 MHz, High-speed mode)10 MHz (Maximum)16 K to 60 K bytes 640 to 2560 bytes 4-bit ✕ 1, 1-bit ✕ 1(4 pins sharing SEG)8-bit ✕ 5, 7-bit ✕ 1, 2 bit ✕ 1(16 pins sharing SEG)
17 sources, 16 vectors (includes key input interrupt)8-bit ✕ 3, 16-bit ✕ 2
8-bit ✕ 1 (UART or Clock-synchronized)10-bit ✕ 8 channels or 8 bit ✕ 8 channels 8-bit ✕ 1
32 bytes ✕ 2 blocks 1/2, 1/32, 3, 4432
Built-in feedback resistor
(connect to external ceramic rasonator or quartz-crystal oscillator)Built-in feedback resistor
(connect to external quartz-crystal oscillator or on-chip oscillator)4.5 to 5.5V 4.0 to 5.5V 2.5 to 5.5V 2.0
to 5.5V 1.8 to 5.5V 2.5 to 5.5V 2.0 to 5.5V 1.8 to 5.5V 1.8 to 5.5V
Std. 18 mW (Vcc = 5V, f(X IN ) = 8MHz, Ta = 25 °C)
Std. 18 µW (Vcc = 2.5V, f(X IN ) = stopped, f(X CIN ) = 32kHz, Ta = 25 °C)Std. 35 µW (Vcc = 2.5V, f(X IN ) = stopped, f(X CIN ) = stopped, Ta = 25 °C)V CC 10mA -20 to 85 °C CMOS sillicon gate
80-pin plastic molded LQFP/QFP
Number of basic instructions Instruction execution time Oscillation frequency Memory sizes ROM RAM Input port P34-P37, P40
I/O port P0-P2, P41-P47, P5, P6, P70, P71
Interrupt Timer
Serial interface A/D converter Watchdog timer ROM correction function LCD drive control Bias circuit
Duty
Common output Segment output
Main clock generating circuits Sub-clock generating circuits Power source voltage
In frequency/2 mode (f(X IN ) ≤ 10MHz)In frequency/2 mode (f(X IN ) ≤ 8MHz)In frequency/4 mode (f(X IN ) ≤ 10MHz)In frequency/4 mode (f(X IN ) ≤ 8MHz)In frequency/4 mode (f(X IN ) ≤ 5MHz)In frequency/8 mode (f(X IN ) ≤ 10MHz)In frequency/8 mode (f(X IN ) ≤ 8MHz)In frequency/8 mode (f(X IN ) ≤ 5MHz)In low-speed mode
Power dissipation
In frequency/2 mode In low-speed mode at X CIN
In low-speed mode at on-chip oscillator
Input/Output Input/Output withstand voltage characteristics
Output current Operating temperature range Device structure Package
Function
PIN DESCRIPTION
Table 2 Pin description (1)
V CC , V SS Function
Pin Name Function except a port function
•LCD segment output pins
Power source •Apply voltage of power source to V CC , and 0 V to V SS . (For the limits of V CC , refer to “Recom-mended operating conditions”).
V REF AV SS RESET X IN X OUT
V L1–V L3COM 0–COM 3
SEG 0–SEG 11P00/SEG 16–P07/SEG 23
P10/SEG 24–P17/SEG 31P20/KW 0 –P27/KW 7
P34/SEG 12 –P37/SEG 15
Analog refer-ence voltage Analog power source Reset input Clock input Clock output
LCD power source
Common output
Segment output I/O port P0
I/O port P1
I/O port P2
•Reference voltage input pin for A/D converter.•GND input pin for A/D converter.•Connect to V SS .
•Reset input pin for active “L”.
•Input and output pins for the main clock generating circuit.•Feedback resistor is built in between X IN  pin and X OUT  pin.
•Connect a ceramic resonator or a quartz-crystal oscillator between the X IN and X OUT  pins to set the oscillation frequency.
•If an external clock is used, connect the clock source to the X IN  pin and leave the X OUT  pin open.•This clock is used as the oscillating source of system clock.
•Input 0 ≤ V L1 ≤ V L2 ≤ V L3 voltage.•Input 0 – V L3 voltage to LCD.•LCD common output pins.
•COM 2 and COM 3 are not used at 1/2 duty ratio.•COM 3 is not used at 1/3 duty ratio.
•LCD segment output pins.•8-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each port to be individually programmed as either input or output.•Pull-down control is enabled.•8-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.
•4-bit input port.
•CMOS compatible input level.•Pull-down control is enabled.
•Key input (key-on wake-up) interrupt input pins
connect下载•LCD segment output pins
Input port P3
Table 3 Pin description (2)
Function
Pin Function except a port function P40P42/INT 0,P43/INT 1P44/R X D,P45/T X D,P46/S CLK ,
P47/S RDY /S OUT
P50/INT 2,
P51/INT 3P52/RTP 0,P53/RTP 1P54/CNTR 0,P55/CNTR 1P56/T OUT P57/ADT P60/AN 0–P67/AN 7
P70/X COUT,P71/X CIN
•1-bit Input port.
•CMOS compatible input level.•7-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•8-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.
•8-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.
•2-bit I/O port.
•CMOS compatible input level.•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.
•φ clock output pin •Interrupt input pins
•Interrupt input pins •Real time port function pins •Timer X, Y function pins •Timer 2 output pins •A/D conversion input pins •Sub-clock generating circuit I/O pins.(Connect a resonator. External clock cannot be used.)P41/φ
•Serial interface function pins
•A/D trigger input pins
Name I/O port P4
I/O port P5I/O port P6
I/O port P7
Input port P4•QzROM program power pin

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