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Summary Lightweight IP (lwIP) is an open source TCP/IP networking stack for embedded systems. Xilinx
Embedded Development Kit (EDK) provides lwIP software customized to run on Xilinx
Embedded systems containing either a PowerPC ® or a MicroBlaze™ processor. This
application note describes how to utilize the lwIP library to add networking capability to an
embedded system. In particular, lwIP is utilized to develop the following applications: echo server, web server, and a TFTP server.
Included
Systems
Included with this application note are reference systems for the Xilinx ML505, ML403 and Spartan ®-3AN FPGA Starter Kit boards:www.xilinx/support/documentation/application_notes/xapp1026.zip Hardware and
Software Requirements The hardware and software requirements are:•One of Xilinx ML505, ML403 or Spartan-3AN Starter  Development Board •
Xilinx Platform USB Cable or Parallel IV Cable •
RS232 Cable •
A crossover ethernet cable connecting the board to a Windows or Linux host.•
Serial Communications Utility Program, such as HyperT erminal or Teraterm •
Xilinx Platform Studio 10.1i •ISE ® 10.1 design tools Introduction lwIP  is an open source networking stack designed for embedded systems. It is provided under
a BSD style license. The objective of this application note is to describe how to use lwIP
shipped along with the Xilinx EDK to add networking capability to an embedded system. In
particular, this application note describes the:
•
EDK hardware system requirements for running lwIP •Software applications (echo server, web server and TFTP server) utilizing lwIP .
Referenceweight的搭配
System Specifics The reference design for this application note is structured in the following way. The zip file contains two folders, “raw” and “socket”, both of which have the structure as shown in Table 1.Application Note: Embedded Processing
Table  1:  Structure of raw  and socket  Folders in the Reference Design
Folder
Contents ml505
EDK design for ML505 board: contains MicroBlaze, xps_ll_temac and SDMA.ml403
EDK design for ML403 board: contains PPC405, xps_ll_temac and xps_ll_fifo.s3an EDK design for Spartan-3AN Starter board: contains MicroBlaze and
xps_ethernetlite.
The raw folder contains applications that use the lwIP raw API. The socket folder contains software that uses the API of the lwIP socket. Within each design, there is a software folder (apps/src) containing the source code for all the applications. The same source code is used in all three designs.
Hardware Systems
Three reference hardware systems are present in the reference design. These include designs for the ML505, ML403 and Spartan-3AN starter kit boards. This section describes the hardware designs.
Minimal Hardware Requirements for lwIP
To run lwIP, the following hardware components are required:
•  A processor: In a Xilinx EDK based embedded system, this can be a PowerPC 405 processor, or a MicroBlaze soft-processor, depending on the FPGA.
•An Ethernet MAC: The Ethernet MAC IP is required to send and receive packets. EDK provides two MAC IPs:
♦xps_ethernetlite: a small (low area), simple Ethernet MAC that is suitable for applications that require low performance network connectivity
♦xps_ll_temac: a high performance ethernet MAC that is suitable for applications that require high bandwidth network connectivity. It can utilize the embedded Hard Trimode Ethernet MACs present in some FPGA families.
•Interrupt controller: The Xilinx lwIP adapters work in interrupt mode only, meaning that packet reception or transmission is notified to software via interrupts by the ethernet MAC.
An interrupt controller is required to connect multiple sources of interrupt to the processor.•Programmable Timer: lwIP requires a periodic interrupt to update TCP timers. This is typically implemented by programming a timer to generate interrupts at a constant rate.
PowerPC 405 contains an internal timer which can be used for this purpose. For
MicroBlaze systems however, an external timer is required. EDK provides the xps_timer IP core that can be used for this purpose.
Optional Hardware Components
The web server software application demonstrates how to control or monitor the status of an embedded system by interfacing to LEDs or DIP switches. These peripherals are controlled by GPIO (General Purpose I/O) cores. Applications requiring such functionality must add XPS GPIO IP cores to interface to the peripherals.
Hardware System Block Diagrams
The block diagrams of the three hardware designs present in the reference design are shown below.
ML505 Hardware System
The ML505 hardware design shown in Figure1 is comprised of a MicroBlaze soft processor, a Multi-Ported Memory Controller (MPMC) connected to DDR2 memory, and the high performance XPS LL TE
MAC core. A timer is present as a source of periodic interrupts. The interrupt controller connects the DMA receive and transmit interrupts, EMAC error interrupt and the timer interrupt to the processor. XPS GPIO cores are used to connect to LEDs and DIP switches. The system frequency is 125 MHz.
ML403 Hardware System
The ML403 system shown in Figure2 utilizes the embedded PowerPC processor for running all software applications. The system has a xps_ll_temac core with a FIFO interface. The local-link interface of the xps_ll_temac is connected to the PLB via a xps_ll_fifo adapter. In such a system
with a FIFO, the processor is responsible for all data transfers from the EMAC to the memory controller (MPMC). The PIT (Programmable Interval Timer) within the PowerPC is used as a source of periodic interrupts, so there is no need for an external timer. The xps_gpio cores connect to the LEDs and DIP switches. In this system, the PowerPC is clocked at 300 MHz and the rest of the peripherals are clocked at 100 MHz.
Figure 1:ML505 Hardware System
Figure 2:ML403 Hardware System
Spartan-3AN Starter Kit Hardware System
The Spartan-3AN starter kit system shown in Figure3 is the simplest of the three systems. It uses the s
mall xps_ethernetlite EMAC IP to provide ethernet connectivity. The xps_ethernetlite core supports 10/100 Mbps link speeds only, and can have a maximum of 2 kb of internal buffer to hold packets. The other components are the same as in the ML505 system. The system frequency is 62.5 MHz.
Software Applications The reference design includes three software applications: echo server, web server and a TFTP server. The applications are available in RAW and Socket modes.
Echo Server
The echo server is a simple program that echoes whatever input is sent to the program via the network. This application provides a good starting point for investigating how to write lwIP applications.
The socket mode echo server is structured as follows. A main thread listens continually on a specified echo server port. For each connection request, it spawns a separate echo service thread, and then continues listening on the echo port.
while (1) {
new_sd = lwip_accept(sock, (struct sockaddr *)&remote, &size);
sys_thread_new(process_echo_request, (void*)new_sd,
DEFAULT_THREAD_PRIO);
}
The echo service thread receives a new socket descriptor as its input on which it can read received data. This thread does the actual echoing of the input to the originator.
while (1) {
/* read a max of RECV_BUF_SIZE bytes from socket */
n = lwip_read(sd, recv_buf, RECV_BUF_SIZE));
/* handle request */
nwrote = lwip_write(sd, recv_buf, n));
}
Figure 3:Spartan-3AN Starter Kit Hardware System
Note:The above code snippets are not complete and are intended to show the major structure of the code only.
The socket mode provides a simple API that blocks on socket reads and writes until they are complete. However, the socket API requires many pieces to achieve this, chief among them being a simple multit
hreaded kernel (xilkernel). Because this API contains significant overhead for all operations, it is slow.
The RAW API provides a callback style interface to the application. Applications using the RAW API register callback functions to be called on significant events like accept, read or write. A RAW API based echo server is single threaded, and all the work is done in the callback functions. The main application loop is structured as follows.
while (1) {
xemacif_input(netif);
transfer_data();
}
The function of the application loop is to receive packets constantly (xemacif_input), then pass them on to lwIP. Before entering this loop, the echo server sets up certain callbacks: /* create new TCP PCB structure */
pcb = tcp_new();
/* bind to specified @port */
err = tcp_bind(pcb, IP_ADDR_ANY, port);
/* we do not need any arguments to callback functions */
tcp_arg(pcb, NULL);
/* listen for connections */
pcb = tcp_listen(pcb);
/* specify callback to use for incoming connections */
tcp_accept(pcb, accept_callback);
This sequence of calls creates a TCP connection and sets up a callback on a connection being accepted. When a connection request is accepted, the function accept_callback is called asynchronously. Because an echo server needs to respond only when data is received, the accept callback function sets up the receive callback by performing:
/
* set the receive callback for this connection */
tcp_recv(newpcb, recv_callback);
When a packet is received, the function recv_callback is called. The function then echoes the data it receives back to the sender:
/* indicate that the packet has been received */
tcp_recved(tpcb, p->len);
/* echo back the payload */
err = tcp_write(tpcb, p->payload, p->len, 1);
Although the RAW API is more complex than the SOCKET API, it provides much higher throughput because it does not have a high overhead.

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