A3950 November 4, 2005
DMOS Full-Bridge Motor Driver
Functional Block Diagram
Control Logic Table1
Pin
Function PHASE ENABLE MODE SLEEP OUTA OUTB
11X1H L Forward
01X1L H Reverse
X011L L Brake (slow decay)
1001L H Fast Decay Synchronous Rectification2
0001H L Fast Decay Synchronous Rectification2
X X X0Z Z Sleep Mode
1X iindicates “don’t care,” Z indicates high impedence.
2To prevent reversal of current during fast decay synchronous rectification, outputs go to the high impedance state as the current approaches 0 A.
A3950
DMOS Full-Bridge Motor Driver ELECTRICAL CHARACTERISTICS at T J = 25°C, V BB = 8 to 36 V, unless noted otherwise
Characteristics Symbol Test Conditions Min.Typ.Max.Units
Motor Supply Current I BB f PWM < 50 kHz –68.5mA Charge pump on, outputs disabled–3  4.5mA Sleep mode––10μAtimeout of 5000ms exceeded
PHASE, ENABLE, MODE Input Voltage V IH  2.0––V V IL––0.8V
SLEEP Input Voltage V IH  2.7––V V IL––0.8V
PHASE, MODE Input Current1I IH V IN = 2.0 V–<1.020μA I IL V IN = 0.8 V–<–2.0–20μA
ENABLE Input Current I IH V IN = 2.0 V–40100μA I IL V IN = 0.8 V–1640μA
SLEEP Input Current I IH V IN = 2.7 V–2750μA I IL V IN = 0.8 V–<110μA
NFAULT Output Voltage V OL I sink = 1.0 mA––0.4V Input Hysteresis, except SLEEP V IHys100150
200mV
Output On Resistance R DS(on)Source driver, I OUT = -2.8 A, T J=25°C–0.350.48ΩSource driver, I OUT = -2.8 A, T J=125°C–0.550.8ΩSink driver, I OUT = 2.8 A, T J=25°C–0.30.43ΩSink driver, I OUT = 2.8 A, T J=125°C–0.450.7Ω
Propagation Delay Time t pd PWM, change to source or sink ON–600–ns PWM, change to source or sink OFF–100–ns
Crossover Delay t COD–500–ns Protection Circuitry
UVLO Threshold V UV V BB increasing–  6.5–V UVLO Hysteresis V UVHys–250–mV Overcurrent Threshold2I OCP3––A Overcurrent Protection Period t OCP–  1.2–ms Thermal Warning Temperature T JW Temperature increasing–160–°C Thermal Warning Hysteresis T JWHys Recovery = T JW – T JWHys–15–°C Thermal Shutdown Temperature T JTSD Temperature increasing–175–°C Thermal Shutdown Hysteresis T JTSDHys Recovery = T JTSD – T JTSDHys–15–°C For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2Overcurrent protection is tested at 25°C in a restricted range and guaranteed by characterization.
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions*Value Units
Package Thermal Resistance RθJA 4-layer PCB based on JEDEC standard34ºC/W 2-layer PCB with 3.8 in.2 copper both sides, connected by thermal vias43ºC/W
*Additional thermal data available on the Allegro Web site. November 4, 2005
A3950
DMOS Full-Bridge Motor Driver
A Charge pump and VREG power-on delay (≈200 µs)
SLEEP ENABLE PHASE MODE
V OUTA
V BB
V BB
V OUTB
I OUTX
Timing Diagram: PWM Control
November 4, 2005
A3950
DMOS Full-Bridge Motor Driver
BLANK
NFAULT
Motor lead short condition
Normal dc
motor capacitance
Charge Pump
Counter
ENABLE,Source or Sink
I OUT x
I I V OUTA
V OUTB Timing Diagram: Overcurrent Control
November 4, 2005

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