© 1999 Fairchild Semiconductor Corporation DS500022
www.fairchildsemi
June 1997
Revised December 1999
FST6800 10-Bit Bus Switch with Pre-Charged Outputs
FST6800
10-Bit Bus Switch with Pre-Charged Outputs
General Description
The Fairchild Switch FST6800 provides 10-bits of high-speed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise.
The device is organized as a 10-bit switch with a bus enable (OE) signal. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and the B Port is precharged to BiasV through an equivalent 10-k Ω resistor.Features
s 4Ω switch connection between two ports.s Minimal propagation delay through the switch.s Low l CC .
s Zero bounce in flow-through mode.
s Output precharge to minimize live insertion noise.s Control inputs compatible with TTL level.
Ordering Code:
Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram Pin Descriptions
Connection Diagram
Truth Table
Order Number Package Number
Package Description
FST6800WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide FST6800QSC MQA2424-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST6800MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Name
Description OE Bus Switch Enable
A Bus
A B
Bus B
OE B 0–B 9Function L A 0–A 9Connect H
BiasV
Precharge
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F S T 6800
Absolute Maximum Ratings (Note 1)
Recommended Operating Conditions (Note 3)
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The Recommended Operating Conditions tables will define the conditions for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Note 4: Typical values are at V CC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Supply Voltage (V CC )−0.5V to +7.0V DC Switch Voltage (V S )−0.5V to +7.0V Bias V Voltage Range
−0.5V to +6.0V DC Input Voltage (V IN ) (Note 2)−0.5V to +7.0V
DC Input Diode Current (l IK ) V IN <0V −50mA DC Output (I OUT ) Sink Current 128mA DC V CC /GND Current (I CC /I GND )+/− 100mA Storage Temperature Range (T STG )
−65°C to +150 °C
Power Supply Operating (V CC ) 4.0V to 5.5V Precharge Supply (BiasV) 1.5V to V CC Input Voltage (V IN )0V to
5.5V Output Voltage (V OUT )0V to 5.5V
Input Rise and Fall Time (t r , t f )Switch Control Input 0nS/V to 5nS/V Switch I/O
0nS/V to DC Free Air Operating Temperature (T A )
−40 °C to +85 °C
Symbol Parameter
V CC (V)T A = −40 °C to +85 °C Units Conditions
Min
Typ (Note 4)
Max V IK Clamp Diode Voltage 4.5−1.2
V I IN = −18mA
V IH HIGH Level Input Voltage 4.0–5.5 2.0
V V IL LOW Level Input Voltage 4.0–5.50.8V I I Input Leakage Current 5.5±1.0
µA 0≤ V IN ≤5.5V I O Output Current
4.50.25
mA BiasV = 2.4V, B = 0I OZ OFF-STATE Leakage Current 5.5±1.0µA 0 ≤A ≤V CC
R ON
Switch On Resistance 4.547ΩV IN = 0V, I IN = 64mA (Note 5)
4.547ΩV IN = 0V, I IN = 30mA 4.5815ΩV IN = 2.4V, I IN = 15mA 4.0
11
20ΩV IN = 2.4V, I IN = 15mA I CC Quiescent Supply Current 5.53µA V IN = V CC or GND, I OUT = 0∆ I CC
Increase in I CC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at V CC or GND
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FST6800
AC Electrical Characteristics
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance (Note 7)
Note 7: T A = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 ΩNote: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, t W = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
Symbol
Parameter
T A = −40 °C to +85 °C,C L = 50pF, RU = RD = 500ΩUnits
Conditions
Figure No.
V CC = 4.5 – 5.5V V CC = 4.0V Min
Max Min
Max t PHL ,t PLH Prop Delay Bus to Bus (Note 6)0.250.25ns V I = OPEN
Figures 1,
2t PZH Output Enable Time
1.5 6.2 6.5ns V I = OPEN, BiasV = GND Figure 1Figure 2t PZL 1.5 6.2 6.5ns V I = 7V, BiasV = 3V t PHZ Output Disable Time
1.5 6.1 6.5ns V I = OPEN, BiasV = GND Figure 1Figure 2
t PLZ
1.5
7.3
6.8
ns
V I = 7V, BiasV = 3V
Symbol Parameter
Typ Max
Units Conditions
C IN Control Pin Input Capacitance 3pF V CC = 5.0V C I/O
Input/Output Capacitance
5
pF
V CC , OE = 5.0V
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F S T 6800
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA24
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FST6800 10-Bit Bus Switch with Pre-Charged Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild ’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICY
FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accord
ance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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