Decentralized Control for Parallel Operation of Distributed Generation Inverters Using
Resistive Output Impedance
Josep M.Guerrero,Member,IEEE,JoséMatas,Luis García de Vicuña,
Miguel Castilla,and Jaume Miret,Member,IEEE
Abstract—In this paper,a novel wireless load-sharing controller for islanding parallel inverters in an ac-distributed system is pro-posed.This paper explores the resistive output impedance of the parallel-connected inverters in an island microgrid.The control loops are devised and analyzed,taking into account the special nature of a low-voltage microgrid,in which the line impedance is mainly resistive and the distance between the inverters makes the control intercommunication between them difficult.In con-trast with the conventional droop-control method,the proposed controller uses resistive output impedance,and as a result,a different control law is obtained.The controller is implemented by using a digital signal processor board,which only uses local mea-surements of the unit,thus increasing the modularity,reliability, andflexibility of the distributed system.Experimental results are provided from two6-kV A inverters connected in parallel,showing the features of the proposed wireless control.
Index Terms—Distributed generation(DG),droop method, inverters,microgrids.
I.I NTRODUCTION
T HE GENERATION of highly reliable good-quality elec-trical power near the place where it is demanded can imply a change of paradigm.This concept,which is named distrib-uted generation(DG),is especially promising when dispersed-energy storage systems(fuel cells,compressed-air devices, orflywheels)and renewable-energy resources(photovoltaic arrays,variable speed wind turbines,or combined cycle plants) are available.These resources can be connected through power conditioning ac units to local electric power networks,which are also known as microgrids[1].Hence,inverters or ac–ac converters are connected to the local dispersed loads via a
Manuscript received September7,2005;revised February24,2006.Abstract published on the Internet January14,2007.This work was supported by the Spanish Ministry of Science and Technology under Grant DPI2003-06508-C02-01.This paper was presented in part at the European Confer-ence on Power Electronics and Applications(EPE’05),Dresden,Germany, September11–14,2005.
J.M.Guerrero is with the Departament d’Enginyeria de Sistemes, Automàtica i Informàtica Industrial(ESAII),Escola Universitària d’Enginyeria Tècnica Industrial de Barcelona(EUETIB),Universitat Politècnica de Catalunya(UPC),08036Barcelona,Spain(uerrero@ upc.edu).
J.Matas,L.García de Vicuña,M.Castilla,and J.Miret are with the Departa-ment d’Enginyeria de Electrònica,Universitat Politècnica de Catalunya,08036 Barcelona,Spain.
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Digital Object Identifier10.1109/TIE.2007.892621common electrical distribution bus.In such systems,every unit must be able to operate independently without intercommu-nication due to the long distance between DG units[2].In order to achieve good power sharing,the controller makes tight adjustments over the output-voltage frequency and amplitude of the inverter[3].This control technique,which is known as the droop method,consists in emulating the behavior of large power generators,which drop their frequencies when the power delivered increases.
There are many control schemes for linear load sharing based on the droop method[4]–[10].In[8],a controller was proposed to also share nonlinear loads by adjusting the output-voltage bandwidth with the delivered harmonic power.In an-other approach[10],every single term of the harmonic current is used to produce a proportional droop in the corresponding harmonic voltage term.However,the droop method exhibits a slow dynamic response since it requires low-passfilters with a reduced bandwidth to
calculate the average value of the active and reactive powers[11].In[12],a wireless controller was proposed in order to enhance the dynamic performance of the paralleled inverters by adding integral–derivative power terms to the droop-control method.
Using the conventional droop method,the output impedance and line impedance are considered to be mainly inductive, which is often justified by the large inductor value or by the long distances between the units.However,this is not always true since the output impedance of the inverter depends also on the control strategy[13],[14],and the line impedance is predom-inantly resistive for low-voltage cabling.Another problem of the droop method is that the power sharing is degraded if either the output impedance or the line impedance is unbalanced.To ensure inductive output impedance,fast control loops are added to the droop-control method,thus avoiding the use of an extra output inductor.
On the other hand,the droop method has been studied extensively in parallel dc converters[15]–[21].In these cases, resistive output impedance is enforced easily by subtracting a proportional term of the output current from the voltage reference.However,little work has been done in the applica-tion of the resistive droop method to parallel inverters[22], [23].The advantages of such an approach are the following.
1)The overall system is more damped.2)It provides automatic harmonic current sharing.3)Phase errors barely affect active power sharing.
0278-0046/$25.00©2007IEEE
Fig.1.Distribution scheme of a possible
microgrid.
Fig.2.Equivalent circuit of a DG unit connected to the common ac bus.
In this paper,we propose a novel control scheme that is able to further improve the steady-state and transient response of parallel-connected inverters without using communication signals.The controller
uses resistive output impedance,which allows good power sharing with low sensitivity to the line-impedance unbalances.Finally,the output impedance is de-signed to share not only active and reactive powers but also the harmonic content of the total loads.
II.R ESISTIVE O UTPUT -I MPEDANCE
P OWER -F LOW A NALYSIS
Fig.1shows a general scheme of a microgrid that consists of a combination of multiple microgenerator DG units,distributed
loads,and electric power interfaces that transfer energy to the local ac bus.The microgrid can be connected to the utility grid through a single point of common coupling.When the utility grid is not present,the DG units should be able to share the total power demanded by the local loads,adjusting their output-voltage references as a function of the delivered power.
Fig.2shows the equivalent circuit of a DG unit as an inverter connected to a common ac bus through a decoupling output impedance.The active and reactive powers injected to the bus by every unit can be expressed as follows [24]:
P =
EV
Z cos φ−V 2Z cos θ+EV
Z
sin φsin θ(1)
Q =
EV Z cos φ−V 2
Z
sin θ−
EV
Z
sin φcos θ(2)
where E is the amplitude of the inverter output voltage,V is the
common bus voltage,φis the power angle,and Z and θare the magnitude and the phase of the output impedance,respectively.
R cos φ−V 2
R (3)Q =−EV
R
sin φ.(4)
From (4),the stability bounds of φcan be found.Note that the range −90◦<φ<+90◦causes a negative slope of Q ,as shown in Fig.3.Outside of this range,a change of slope appears,thus leading to an unstable behavior.
Using polar coordinates,the complex power injected to the ac bus (S =P +jQ )can be written as
S =−V 2R +EV R
e −jφ(5)
which is shown in Fig.4as a circumference with a radius of EV/R and a center point at −V 2/R .
It is worth pointing out that S (and,thus,both P and Q )depends simultaneously on both output-voltage parameters E and φ,as shown in Fig.5.Assuming an initial power S A ,the power moves to S B by increasing E (from E A to E B ),given that the circumference diameter becomes higher (φis constant).Note that both P and Q increase when E increases.On the other hand,the power moves clockwise from S B to S C ,following the exterior circle by increasing φfrom φB to φC (E is constant now).Note that P decreases and Q increases when φincreases.In practical applications,power angle φis normally small;thus,a P/Q decoupling approximation (cos φ≈1and
R
·(E−V)(6)
Q≈−EV
R
·φ.(7)
Consequently,active power P can be controlled by the inverter output-voltage amplitude E,while reactive power Q can be regulated by the power angleφ,which is the opposite strategy to the conventional droop method.
III.C ONTROL D ESIGN
The aim of this section is to propose a controller that can guarantee proper operation of the inverters without using control intercommunications.The proposed controller consists of three nested loops,namely;1)the inner output-voltage regulation loop;2)the resistive-output-impedance loop;and
3)the P/Q-sharing outer loop.
A.Inner Output-Voltage Regulation Loop
Fig.6shows the power stage of a single-phase inverter,which includes an insulated-gate bipolar transistor(IGBT)bridge configuration and an L–Cfilter.The equivalent series resistance (ESR)of thefilter capacitor is not considered in the model
since
dt
=V in u−v o−r L i L(8)
active下载C
dv o
dt
=i c=i L−i o(9)
where r L is the ESR of the inductance L and u is the control variable,which can take the values1,0,or−1,depending on the state of the pair of switches S1–S2and S3–S4. According to the nonlinear control and feedback lineariza-tion theory,the output voltage of this system is of a second-order relative degree.Thus,from(8)and(9),the open-loop averaged output-voltage dynamics can be ,
LC
d2 v o
dt
+r L C d v o
dt
+ v o +L d i o
dt
+r L i o = V in u
(10) where means the average value over one switching cycle.
In order to linearize the system in a large-signal sense and achieve good tracking of the output voltage,we propose the following controller expression:
V in u =v ref+k p(v ref− v o )+k d d
dt
(v ref− v o )(11) where v
ref is the output-voltage reference.Note that the con-troller does not need any integral term to avoid steady-state error since it can add lag to the output-voltage tracking.Instead, it uses a feedforward term of thefilter input voltage V in·u. Besides,the integral term adds an inductive behavior to the output impedance[13],which is not desirable for our approach.
Fig.8.Root-locus diagrams.(a)k d=1.3·10−4for0≤k p≤10and(b)k p=4.5for10−4≤k d≤10−8. By equating(10)and(11),the closed-loop output-voltage
dynamic behavior takes the form
v o=
k d s+(1+k p)
LCs+(r L
)s+(1+k)v ref
−o(12)
where s is the Laplace operator.From the preceding expres-sion,the inverter can be modeled by a two-terminal Thevenin equivalent circuit of the form
v o=G(s)·v ref−Z o(s)·i o(13) where G(s)is the voltage gain and Z o(s)is the output im-pedance,as shown in Fig.7.On the one hand,the voltage gain is responsible for good output-voltage tracking.Due to the feedforward term,it is able to perfectly follow the output-voltage reference.On the other hand,the output impedance at low frequency can be easily reduced by increasing k p.
The output impedancefixes the dynamics of the output-voltage inverter.From(12),we can deduce that the system has onefixed zero at r L/L and two complex-conjugated poles, which can be adjusted by means of k p and k d.After studying the root locus of the closed-loop output impedance,we can consider that the poles are dominant since the zero is far from them.As a consequence,we can obtain the desired dynamical response by adjusting these poles.Fig.8shows the root locus for different values of k p and k d.Fig.8(a)depicts that,by increasing k p,the imaginary part of the poles increases,which results in a less damped system.From Fig.8(a),we can observe that,by decreasing k d,the poles are attracted to the imaginary axis,making the system become faster but more oscillatory. Using the param
eters listed in Table I,a proper transient response can be obtained,and,as illustrated in Fig.9,the output impedance at line frequency(50Hz)is about−30dB and60◦. In this situation,the output-impedance value has comparable
TABLE I
P OWER S TAGE AND C ONTROLLER P ARAMETERS OF THE I NVERTER
Fig.9.Bode diagram of the voltage gain and the output impedance of the closed-loop
inverter.
Fig.10.Bode diagram of the output impedance as a function of r L parameter (r L =0.1,0.2,and 0.3Ω)
.
Fig.11.Block diagram of the virtual impedance loop concept.
where Z V (s )is the virtual output impedance and the output-voltage reference at no load is defined as v ∗
o
.Fig.11shows the virtual impedance loop in relation to the closed-loop system.The value of Z V (s )should be larger than Z o (s )and the maximum line impedance expected.
This fast control loop known as virtual output-impedance loop can be used to fix the output impedance of the inverter in terms of magnitude and phase.Resistive output impedance around the output-voltage frequency can be implemented by drooping the output-voltage reference proportionally to output current i o .Individual output-impedance values for high-order current harmonics are obtained by subtracting a voltage,which is proportional to the current harmonics,from the output-voltage reference.
Thus,the proposed output-voltage reference can be expressed as
v ref =
v ∗
o
−R D i o −11 h =3,odd
(R h −R D )i oh
(15)
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