NC HIN LIN FO_RST CIN GND FO VCC NC NC VB HPOUT HNOUT1HNOUT2
VS NC Outline:24P2Q
LPOUT LNOUT1LNOUT2VNO
NC NC NC NC
active下载
ELECTRICAL CHARACTERISTICS (Ta=25C V ELECTRICAL CHARACTERISTICS (Ta=25 °C,V C Symbol
Parameter
I FS High side leakage current V B = V S = 1I BS V BS quiescent supply current HIN = LIN =I CC V CC quiescent supply current HIN = LIN =V OH High level output voltage I O = 0A, HP Low level output voltage =0A HN V OL Low level output voltage
I O = 0A, HN V IH High level input threshold voltage HIN, LIN, F V IL Low level input threshold voltage HIN, LIN, F I IH High level input bias current V IN =5V I IL
Low level input bias current
V IN =0V HIN on-pul HIN off-pu LIN on-pul tFilter Input signals filter time
LIN on pul LIN off-pul FO_RST on FO off-puls V HNO2High side active Miller clamp NMOS input threshold voltage V IN =0V V LNO2Low side active Miller clamp NMOS input threshold voltage
V IN =0V tV NO2Active Miller clamp NMOS filter time V IN =0V V OLFO Low level FO output voltage
I FO =1mA
V IHFO High level FO input threshold voltage V ILFO Low level FO input threshold voltage V BSuvr V BS supply UV reset voltage V BSuvt V BS supply UV trip voltage V BSuvh V BS supply UV hysteresis voltage V BSuvh = V B tV BSuv V BS supply UV filter time V CIN CIN trip voltage V POR POR trip voltage
I OH Output high level short circuit pulsed current HPOUT(LP I OL1Output low level short circuit pulsed current HNOUT1(L I OL2Active Miller clamp NMOS output low level short circuit pulsed current HNOUT2(L
R OH Output high level on resistance I O = 1A, R O R OL1Output low level on resistance
I O = -1A, R R OL2Active Miller clamp NMOS output low level on resistance
I O = -1A, R tdLH(HO)High side turn-on propagation delay HPOUT sh tdHL(HO)High side turn-off propagation delay HPOUT sh tdLH(LO)Low side turn-on propagation delay LPOUT sho
tdHL(LO)Low side turn-off propagation delay  LPOUT sho tr Output turn-on rise time CL = 1nF tf Output turn-off fall time
CL = 1nF
Delay matching high side turn on and low side turn off ΔtdLH Delay matching, high side turn-on and low side turn-off tdLH(HO)-ΔtdHL Delay matching, high side turn-off and low side turn-on
tdLH(LO)-t V clamp
Active clamp voltage
V cc –GND, Note: Typ. is not specified.
V )=15V unless otherwise specified)CC =V BS (=V B -V
S )=15V, unless otherwise specified)Test conditions
Limits
Unit
Min.
Typ.
Max.
1200V --10μA =0V -0.50.8mA =0V -  1.0  1.5mA POUT, LPOUT 14.5--V NOUT1LNOUT105V NOUT1, LNOUT1 --0.5V FO_RST    2.2  3.0  4.0V FO_RST 0.6  1.5  2.1V 0.6  1.0  1.4mA 0.000.000.01mA lse 80200500ns lse 80200500ns ns se 80200500ns lse 80200500ns n-pulse 80200500ns se
80200500ns 2.0  3.4  5.0V 6.07.69.0V -400-ns --0.95V 2.2  3.0  4.0V 0.6  1.5  2.1V 10.010.811.6V 10.5
11.312.1V BSuvr -V BSuvt 0.20.50.8V 4816μs 0.400.50.60V 4.0
5.57.5V POUT) = 0V, V IN = 5V, PW ≦ 10μs -1-  A LNOUT1) = 15V, V IN = 0V, PW ≦ 10μs --1-  A LNOUT2) = 15V, V IN = 0V, PW ≦ 10μs --1-  A OH = (V OH -V O )/I O -15-Ω R OL1= V O /I O -15-Ω /R OL2= V O /I O
-15-Ω ort to HNOUT1 and HNOUT2, CL = 1nF    1.00  1.27  1.80μs ort to HNOUT1 and HNOUT2, CL = 1nF 0.90  1.21  1.80μs ort to LNOUT1 and LNOUT2, CL = 1nF    1.00  1.39  1.90μs ort to LNOUT1 and LNOUT2, CL = 1nF 0.90  1.19  1.70μs 104080ns 104080ns tdHL(LO)ns tdHL(LO) -10080300ns tdHL(HO)-20180400ns V B -V S
24
-
-
V
3:X(HIN):L H or H L Other:H or L
Note3  : X (HIN) : L→H or H → L. Other : H or L.
Note4  : Output signal (HOUT) is triggered by the edge of input signal.

版权声明：本站内容均来自互联网，仅供演示用，请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系QQ:729038198，我们将在24小时内删除。