1Scope
This test method provides a means to assess the propensity for conductive anodic filament(CAF)growth,a form of elec-trochemical migration within a printed wiring board(PWB). Conductive anodic filaments may be composed of conductive salts,rather than cationic metal ions,however inadequate dielectric for the applied voltage,component failures,and part use exceeding the maximum operating temperature(MOT)of the laminate can contribute to product failures as well.This test method can be used to assess PWB laminate materials, PWB design and application parameters,PWB manufacturing process changes and press-fit connector applications.
2Applicable Documents
2.1IPC
IPC-A-47Composite Test Pattern Ten-Layer Phototool
IPC-2221Generic Standard On Printed Board Design
IPC-9253CAF Test Board(Available in the‘Drafts’section of the5-32e Committee Home Page)
IPC-9254CAF Test Board(Available in the‘Drafts’section of the5-32e Committee Home Page)
IPC/EIA J-STD-001Requirements for Soldered Electrical and Electronic Assemblies
J-STD-004Requirements for Soldering Fluxes
IPC/EIA J-STD-006,Requirements for Electronic Grade Sol-der Alloys and Fluxed and Non-Fluxed Solid Solders for Elec-tronic Soldering Applications
2.2American Society for Testing and Materials(ASTM) ASTM D-257Standard Test Methods for DC Resistance or Conductance of Insulating Materials
3Test Specimens
(Recommended that the latest version of the CAF test board be used)
3.1IPC-9253and IPC-9254The IPC-9253and IPC-9254 have10layers and dimensions are approximately125x175 mm[nominally5x7in].Test board designs for evaluating CAF resistance shall have varying drilled hole wall to drilled hole wall distances for plated holes.These distances can range from as low as0.15mm[0.00591in]separation for alternate laminate materials expected to have very high CAF resistance and minimal copper wicking out from the plated-through hole (PTH),to as high as0.89mm[0.0350in]separation for evalu-ating press-fit connector applications.The drilled hole size, rat
her than the finished hole size,is specified in the chart on the bare board fabrication drawing to ensure consistent spac-ing.Internal layer thieving may be added to plane layers around the perimeter.Test boards should be manufactured so that the machine/grain direction of the woven fiber rein-forcement is perpendicular to the rows of same-net daisy chain vias for A1-A4(machine/grain direction tends to fail first). Test board designs shall have sufficient minimum spacings on outer layers to ensure that surface insulation resistance fail-ures do not occur.Layouts of the IPC-9253and IPC-9254 test board structures(CAF Test Boards)are shown below (Figure1).
IPC-9253and IPC-9254Test Structures A1through A4
The four structures A1-A4each have five rows of connected vias.Within each structure each row has42vias with alternat-ing rows being tied to positive or negative electrodes.The via edge to via edge spacing is varied from one structure to the next by using a different drilled hole size on the same1mm [0.040in]pitch between rows of daisy chain vias.The result-ing via edge to via edge spacings are:0.27mm,0.38mm, 0.51mm,0.65mm[0.0106in,0.0150in,0.0201in,0.0256 in].Other than the use of different drilled hole sizes and a small change in pad sizes,the four structures are identical.The vias in these four test structures A1-A4are aligned with the glass fibers.Since A1-A4evaluate susceptibility to CAF in just one direction,test coupons should be manufactured so that the machine direction of the wo
ven fiber laminate reinforcement is perpendicular to the rows of same-net daisy chain vias (machine direction tends to fail first).
For both A and B test structures the inner and outer layer pads are the ,the same pad size is consistently used within a given test structure,although it does change from structure to structure.All via to electrode connections are made on layer2and are repeated on layer9so that a single etch-out will not affect results.Traces from via to elec-trode are routed on internal layers rather than external layers to minimize potential for surface insulation resistance failure.
Material in this Test Methods Manual was voluntarily established by Technical Committees of IPC.This material is advisory only
and its use or adaptation is entirely voluntary.IPC disclaims all liability of any kind as to the use,application,or adaptation of this
material.Users are also wholly responsible for protecting themselves against all claims or liabilities for patent infringement.
Equipment referenced is for the convenience of the user and does not imply endorsement by IPC.
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Design details for each test structure A1-A4follows in Table1. Note:‘‘Manhattan Distance’’is the shortest orthogonal dis-tance along the X-and/or Y-axes lines between adjacent drilled hole features(corresponds to the orthogonal nature of the laminate material’s woven glass fiber reinforcement(Figure 2).IPC-9253and IPC-9254Test Structures B1through B4
The four‘‘B’’test structures have seven alternating rows of vias.Within each structure,alternating rows have either27or 26vias with the alternating rows being tied to either positive or negative electrodes.The via edge to via edge spacing is
Figure1Layouts of the Two Versions of the CAF Test Boards
Table1Test Structures A1through A4Design Rules
A1A2A3A4
Outer layer pad size0.86mm[0.0339in]0.81mm[0.0319in]0.75mm[0.0295in]0.69mm[0.0272in] Inner layer pad size0.86mm[0.0339in]0.81mm[0.0319in]0.75mm[0.0295in]0.69mm[0.0272in] Drilled hole size0.74mm[0.0291in]0.63mm[0.0248in]0.51mm[0.0201in]0.37mm[0.0146in] Via edge to via edge
(shortest distance)
0.27mm[0.0106in]0.38mm[0.0150in]0.51mm[0.0201in]0.65mm[0.0256in] Via edge to via edge
(Manhattan Distance)
0.27mm[0.0106in]0.38mm[0.0150in]0.51mm[0.0201in]0.65mm[0.0256in]
On IPC-9254only,bias applied between:J1,J5J2,J5J3,J5J4,J5
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varied from one structure to the next by using a different drilled hole size on the same1.52mm x1.52mm[0.05984in x0.05984in]via grid.The1.52mm x1.52mm[0.05984in x 0.05984in]grid has an inter
stitial via therefore,tipping at a 45°angle results in a square1.08mm x1.08mm[0.04252in x0.04252in]grid.Note:the sketches do not look square when tipped45°but,the CAF Test Boards do.The resulting via edge to via edge spacings are:0.26mm,0.37mm,0.51 mm,0.62mm[0.0102in,0.0146in,0.0201in,0.0244in]. Other than the use of different drilled hole sizes and a small change in pad sizes,the four structures are identical.The vias in the‘‘B’’test structure are not aligned with the glass fibers. If the failure mode is along glass bundles it is reasonable to expect the‘‘B’’test structure to perform better than the‘‘A’’structure for equivalent via edge to via edge spacings.Within a given test structure,the inner and outer layer pads for all10 layers are the ,the same pad size is consistently used within a given test structure although,it does change from structure to structure.All via to electrode connections are made on layer1and are repeated on layer10so that a single etch-out will not affect results.
A conceptual representation of the‘‘B’’test structure is shown to the upper right(Figure3).Design details on each of the four‘‘B’’test structures follows in Table2.
3.2Other Structures Section C is designed to evaluate plated-through hole(PTH)-to-plane layer spacings.It is rec-ommended to use the registration coupon F from either test artwork IPC-A-47or IPC-2221when CAF testing includes this region.Section D in the IPC-9254design is for layer-to-layer Z-axis
CAF testing.Section D in the IPC-9253is for evaluat-ing CAF resistance in a press-fit compliant pin connector application.The feature in the D region is an optional feature that is present automatically with the design.However,the A, B and C regions shall remain as designed in order to provide a standard basis of comparison.
The CAF test board with10layers is designated to evaluate thin single-ply constructions typically used on high perfor-mance boards.This board construction stackup can be reduced down to:(a)four layers by eliminating layers3 through8and(b)only test structures A and B,when just evaluating differences between laminate materials.
3.3CAF Test Board Design This10-layer CAF test board for evaluating the insulation resistance between internal con-ductors within a printed wiring board has the following key features for evaluating hole-hole CAF resistance(Figure3).
Figure2Manhattan Distance(Shortest Orthogonal)
Table2Test Structures B1through B4Design Rules
B1B2B3B4
Outer layer pad size0.94mm[0.0370in]0.89mm[0.0350in]0.84mm[0.0330in]0.75mm[0.0300in] Inner layer pad size0.94mm[0.0370in]0.89mm[0.0350in]0.84mm[0.0331in]0.75mm[0.0295in] Drilled hole size0.81mm[0.0319in]0.71mm[0.0280in]0.57mm[0.0224in]0.46mm[0.0181in] Via edge to via edge
(shortest distance)
0.26mm[0.0102in]0.37mm[0.0146in]0.51mm[0.0201in]0.62mm[0.0244in] Via edge to via edge
(Manhattan Distance)
0.37mm[0.0146in]0.52mm[0.0205in]0.72mm[0.0283in]0.88mm[0.0346in]
On IPC-9254only,bias applied between:J7,J11J8,J11J9,J11J10,J11
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Holes In-Line(in-line with glass fiber direction):There are two rows of42signal-1vias intermeshed with three rows of42 signal-2vias;for a total of168potential in-line PTH-PTH fail-ures for each spacing distance.
Holes Staggered(closest PTH-PTH spacing in diagonal direc-
tion):There are three rows of26signal-1vias intermeshed with four rows of27signal-2vias;for a total of312potential diagonal PTH-PTH failures for each spacing distance.
3.4CAF Test Coupon/Board Quantity The CAF testing data analysis technique recommended for either of these CAF test coupon/board designs requires a minimum25CAF test boards to be run per sample lot per bias level for statistical significance.This provides a total of4,200potential in-line hole-hole CAF failure sites and7,800potential diagonal hole-hole CAF failure sites for each unique sample/condition set.
For comparison,on a1,428I/O BGA device(Figure4)there are about500power/ground pins.So with an average of slightly less than two adjacent power/ground pin spacings per pin there are about1,000potential in-line hole-hole CAF fail-ure sites per BGA device.For a production board with the equivalent of three of these BGA devices and about1200 passives or other components with close power/ground pin spacings,the total number of opportunities for in-line CAF fail-ure would then be about4,200(about the same as the entire CAF test board sample lot of25pieces).
As a general rule,there should be enough CAF test boards run within each sample test lot to have at le
ast the equivalent number of potential CAF failure sites as on a single targeted specific application PWB.
4Equipment/Apparatus or Materialeditor evaluating revision
4.1Environmental Test Chamber A clean test chamber capable of producing and recording an environment of65±2°C[149±3.6°F]or85±2°C[185±3.6°F]and87+3/-2% relative humidity,and that is equipped with cable access to facilitate measurement cables to be attached to the speci-mens under test.
4.2Measuring Equipment A high resistance meter equivalent to that described in ASTM D-257,with a range up to1012ohms and capable of yielding an accuracy of±5%at 1010ohms with an applied voltage of100±2VDC,or an ammeter capable of reading10-10amps and capable of yield-ing an accuracy of±5%in combination with100±2VDC power supply.The values of resistors used shall be verified by reference resistors traceable to known industry or national standards such as NIST.
4.3Power Supply A power supply capable of producing a standing bias potential of10VDC up to100VDC with a
Figure3CAF Test Board PTH-PTH Spacing Design
Figure4BGA Device I/O Pin Assignment Revision
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tolerance of±2VDC,and current supply capacity of at least 1Ampere(Amp).
4.4Current Limiting Resistors Tight control of the total current limiting resistance value is critical for this test method. One106ohm resistor in series shall be used for each current path.Insert the current limiting resistors in series with the ter-minating leads going to each test pattern.Note that some test equipment has current limiting resistors built into the testing systems.For the purposes of this standard test,excluding the current limiting resistor and for each CAF test circuit,the total series resistance of the measuring equipment and wires shall not be more than200ohms.A lower total resistance value will increase potential for damage to the test board when a CAF failure occurs.A higher total current limiting resistance value for each test net removes test conditions further from actual field conditions and is not recommended.
4.5Connecting Wire Use PTFE-or PFE-insulated copper wires and solder the copper wire directly to the board to con-nect test points for each test board to the measurement apparatus.
4.6Other Dedicated Fixtures Hard-wiring is the default connection method.Other dedicated fixtures may be used, provided that the fixture does not change the resistance by more than0.1decade compared to a comparable hard-wired system when measured at the test conditions.These fixtures should be checked for their resistance values frequently.
5Procedure
5.1Test Specimen Preparation
5.1.1Sample Identification Use a method for identifying each test board that does not cause contamination,such as a scribe,making marks away from the biased area(s)of the specimen.Test boards shall be handled by the edges of the board only,and the use of noncontaminating gloves is recom-mended.
5.1.2Prescreen for Opens and Shorts Perform as-received insulation resistance measurements using a mul-timeter to make connection to each net,and check for gross defects.Check for shorts at a1.0megohm setting.No opens are allowed in connected nets.
5.1.3Cleaning Entirely clean each sample(CAF test board)per IPC Test Method  2.3.25(Resistivity of Solvent Extract)by immersion washing until the level of ionic contami-nation is reduced to less than1.0microgram NaCl equivalent per square centimeter and for a maximum of20minutes. Boards not achieving this level of cleanliness within20min-utes shall be scrapped for the purposes of this test.
5.1.4Connecting Wire Plated-through holes near one edge of the board may be used for connecting wire to each test circuit.Cover the test board with noncontaminating film to prevent flux spattering during the wire attach process.After stripping back the wire insulation,use water white rosin(per J-STD-
004,Type B)and best soldering technique(per J-STD-001,Class1or2)to solder(per J-STD-006,Type Sn63) PTFE-or PFE-insulated wires to the connection points on each test board.Ensure against damaging PWB laminate material adjacent to the plated holes during soldering by using appropriate time/temperature parameters for the soldering iron.
5.1.5Cleaning After Attachment Perform appropriate local cleaning and rinsing after the attachment of the connect-ing wires.Isolation resistance between connecting wire attachment sites should remain excellent through96hours conditioning.Note:Each CAF test failure that does occur dur-ing subsequent testing should be checked to determine whether the connecting wire attach area is the low resistance site.If the connecting wire attach area rather than the daisy chain area is the low insulation resistance site,then that test sample is no longer valid for data analysis.
5.1.6Dry Bake sample boards for six hours in a clean oven at105±2°C[221.0±3.6°F].
5.1.7Precondition Precondition test board samples in a bias-free state(no electrical potential applied to any test pat-tern)for24hours minimum at23±2°C[73.4±3.6°F]and 50±5%relative humidity prior to any initial insulation resis-tance measurements[measuring insulation resistance of each daisy-chain net on each test board before starting the first96 hours(±30minutes)of bias-free temperature and humidity conditioning].
5.1.8Temperature/Humidity/Bias(T/H/B)Chamber Place the specimens in the environmental test chamber in a vertical position such that the air flow is parallel to the direction of all test boards in the chamber.Allow at least approximately2.5 cm[nominally1.0in]between each test board.Place the test boards,as much as possible,toward the center of the cham-ber to help ensure against nonoptimum air flow and/or drops
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