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Silicon Epitaxy by Chemical Vapor Deposition
Martin L. Hammond
1.0INTRODUCTION
The word epitaxy is derived from the Greek “epi”—upon, and “taxis”—to arrange. Thus, epitaxial silicon deposition requires the ability to add and arrange silicon atoms upon a single crystal surface. Epitaxy is the regularly oriented growth of one crystalline substance upon another. Specific applications require controlling the crystalline perfection and the dopant concentration in the added layer.
Two different kinds of epitaxy are recognized:
Homoepitaxy growth in which the epitaxial layer is of the
same material as the substrate.
Heteroepitaxy growth in which the epitaxial layer is a different
material from the substrate.
Virtually all commercial silicon epitaxy is homoepitaxy, with the exception of silicon-on-sapphire.
Epitaxial silicon layers can be created by a wide range of tech-niques, including evaporation, sputtering, molecular beams, and various
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46Thin-Film Deposition Processes and Technologies
regrowth concepts. This chapter discusses epitaxial deposition by chemi-cal vapor deposition (CVD) in which the silicon and dopant atoms are brought to the single crystal surface by gaseous transport.[1][2] Chemical vapor deposition is the formation of stable solids by decomposition of gaseous chemicals using heat, plasma, ultraviolet, or other energy sources, or a combination of sources. CVD is a relatively old technology. It was used to refine refractory metals in the 1800s, to produce filaments for Edison’s incandescent carbon filament lamps in the early 1900s, for hard metal coatings in the 1950s, and for semiconductor material preparation beginning in the 1960s.[2a]
Commercial silicon epitaxy production, at present, is accomplished primarily by CVD using heat as the
energy source for decomposing the gaseous chemicals.
With the silicon epitaxy process, radical changes in materials’ prop-erties can be created over small distances within the same crystal. This capability permits the growth of lightly doped single crystal silicon on top of heavily doped single crystal silicon. At present, no other process technique permits this configuration of doped regions within a single crystal substrate.
Many different configurations are made possible by the CVD epi-taxial deposition process. Some of the possibilities in use today include:•n-type silicon over p-type silicon
•p-type silicon over n-type silicon
•Lightly doped over heavily doped of either type
•Lightly doped over heavily doped buried layer patterns
•Conducting silicon layers over insulating surfaces
•Silicon layers with controlled dopant profiles
•Silicon selectively deposited through oxide
1.1Applications of Silicon Epitaxy
Silicon epitaxy is required for isolation and for device perfor-mance in bipolar integrated circuits. It is also important far discrete device performance, and is becoming important for MOS integrated circuits (ICs).
Chapter 2: Silicon Epitaxy by Chemical Vapor Deposition47 For bipolar devices, epitaxy provides a wide range of device perfor-mance benefits too numerous to describe here. Among these benefits are:[1]
•Higher switching speeds
•Improved high voltage, linearity characteristics
•Simplified isolation
•Lower base resistance
•Independently controlled dopant profiles
•Buried layer patterns
MOS ICs have not required an epitaxy layer to create device isolation; however, as MOS ICs have become more complex, epitaxial layers can provide many device benefits.[3] MOS ICs are usually created in lightly doped substrates. When a lightly doped epitaxial layer is used over a heavily doped substrate, the benefits to MOS ICs include:
•Lower diffused-line capacitance
•Better diffused-line charge retention
•Better control of spurious charge (such as alpha particles
and static charge)
•Improved dynamic random access memory performance
For complementary MOS (CMOS) ICs, the benefit is a very significant improvement in latch-up protection.
Because of its wide-ranging applications to semiconductor technol-ogy, approximately 50% of all silicon processed requires an epitaxy layer, and this percentage is expected to increase to 60–70% when epitaxy is used more extensively in MOS IC production.[4]
Silicon epitaxy is used in a wide range of thicknesses and resistivi-ties. In commercial silicon epitaxy, layer thickness is usually expressed in micrometers (µm), commonly abbreviated microns (µ) or 10-4 cm. Resistiv-ity is expressed as ohm-cm, and resistivity is related to the electrical carrier concentration by Irwin’s curves.[5]
Table 1 lists typical specifications for the common silicon device structures now in production. With the trend to ever smaller feature sizes and ever higher circuit densities, there is a long range tendency toward thinner epitaxial layers; however, the values noted in Table 1 will probably be valid until well into the 1990s.
48Thin-Film Deposition Processes and Technologies
Table 1. Typical Epitaxy Specifications
Device Type Thickness Resistivity
(microns)(ohm-cm) Bipolar discrete devices
High Frequency0.5–30.15–1.5
Power5–100+0.5–100+ Bipolar integrated circuits
Digital memory0.5–50.3–1.5 Microprocessor0.5–50.3–1.5
Linear3–152–20
MOS-on-epitaxy integrated circuits
P/P+4–2010–40 (Back-sealed substrates)
N/N+0.5–71–10
BiMOS*0.5–30.5–3
* BiMOS = Bipolar and MOS devices together in the same device.
Evaluation of silicon epitaxy is a major technology and detailed information for standardized techniques is available in Refs. 5 and 6. This chapter on silicon epitaxy will address:
•Theory of silicon epitaxy by CVD
•Silicon epitaxy process chemistry
•Process adjustments
•Equipment considerations for silicon epitaxy
•Other equipment considerations
•Defects in epitaxy layers
•Safety
•Key technical issues
Chapter 2: Silicon Epitaxy by Chemical Vapor Deposition49 2.0THEORY OF SILICON EPITAXY BY CVD
Successful silicon epitaxy depends upon having:
•High surface mobility for the arriving atoms.
•Numerous, equivalent growth sites.
•Commercially significant growth rates.
reaction rateProduction silicon epitaxy since the early 1960s has been manufactured by chemical vapor deposition in H2 from the chlorosilanes: SiCl4, SiHCl3, SiH2Cl2, and SiH4 in open tube, vapor transport systems. Alternate chem-istries using iodides and bromides have been investigated but no over-whelming advantages have been noted. Fluorine chemistry has not been explored significantly because the Si-F bond is thermodynamically very strong and very high temperatures would be required to crack most Si-F compounds.
As illustrated in Fig. 1, CVD is a heterogeneous reaction involving at least the following steps:[1d][2b][7]
Arrival
1.Bulk transport of reactants into the process volume
2.Gaseous diffusion of reactants to the surface
3.Absorption of reactants onto the surface
Surface reaction
4.Surface reaction (reaction can also take place in the
gas volume immediately above the surface)
5.Surface diffusion
6.Crystal lattice incorporation
Removal of reactant by-products
7.Reaction by-product desorption
8.Gaseous transport of by-products
9.Bulk transport of by-products out of process volume
The rate of chemical vapor deposition is primarily controlled by one of the following major groups of process steps:
•The rate of arrival of reactants
•The surface reaction rate
•The rate of removal of by-products
50Thin-Film Deposition Processes and Technologies
For typical epitaxy process, the reaction conditions are established so that the rate of arrival of the reactants controls the growth rate. This procedure gives the best crystal quality, a feature necessary in good device performance.
The crystal quality of the epitaxial layer is controlled primarily by:
•The nature of the surface prior to epitaxial growth
•The arrival rate relative to the surface diffusion rate
•The nature of the lattice incorporation
If the surface prior to deposition has contamination, such as oxides, which are not removed during heat-up and etch, or if the crystal upon which the epitaxial layer is to be grown is defective, then the epitaxial layer will have crystal defects. If the rate of arrival of reactants greatly exceeds the surface diffusion rate, then the diffusing atoms cannot move to positions of lowest energy, and again, crystal defects occur.
The rate of lattice incorporation is a function of crystal orientation because the density of atomic sites is a function of which crystallographic faces are exposed. Figure 2 shows the effect of substrate orientation on growth rate for (111), (110), and (100) faces. For silicon, the (110) plane has the highest growth rate, followed by the (100) and (111) planes.[8]

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