Chapter 7.22
SPTS ICP-SR Deep Reactive Ion Etch
(sts2) (584)
1.0 Equipment Purpose
1.1 The STS2 ICP SR is a low and high frequency ICP (Inductively Coupled Plasma) etch system.
The ASE (Advanced Silicon Etch) process consists of alternating cycles of etching and protective
polymer deposition to achieve high aspect ratios. The system can be used for deep Si trench
etching of a single 6-inch (150 mm) substrate.
The process chamber is configured for deep Si trench etching. The plasma is inductively coupled
at 13.56 MHz via a matching unit and coil assembly. Independent energy control is provided by a
13.56 MHz biasing of the electrode (platen) via automatic power control and impedance matching.
Alternatively, for SOI wafer etching, a separate 380 kHz generator is available to bias the platen.
The SOI-RF supply is pulsed via a pulsing generator. A high voltage thick dielectric electrostatic
chuck (TD ESC) secures the substrate within the process chamber during the ASE process.
Cooling of the platen is provided by a DI (de-ionized) water chiller. Helium gas is used for aiding
backside cooling of the substrate. Other gases configured with this system include SF6 (Sulfur
Hexafluoride), C4F8 (Octofluorocyclobutane), O2 (Oxygen), and Ar (Argon). An aluminum load
lock allows manual loading of maximum two substrates to be processed.
2.0 Materials Controls & Compatibility
2.1 If you have any special requirements/requests with regards to STS compatible materials, please
discuss it with process engineer 1 before running your process. There are special procedures to
follow when processing materials other than the ones listed below. As of September 2012, the
following materials are allowed in STS2:
2.1.1 Silicon
2.1.2 Standard i-line or g-line photoresist (As a mask)
2.1.3 Silicon Oxide (As a mask)
2.1.4 Silicon Nitride (As a mask)
2.2 DO NOT attempt to purely etch Si Oxide or Si Nitride in STS2. Doing so will excessively
contaminate the process chamber with by-products. In other words, ensure that a substantial area
of Si or Poly-Si is accessible to be etched on your substrate. Exposed metals are not allowed in
this system.
2.3 Recipes for STS2 are generally provided by staff. If you need assistance with writing a process
recipe for a specific application contact staff. Do not attempt to experiment with different
parameter values without the guidance of staff. Any recipe not approved by staff that proves to be
detrimental to the equipment will result in the disqualification and possible recharge of damaged
component replacement to the user that wrote it.
3.0 Applicable Documents
3.1 Process module 35 handle wafer (reversible bonding)
4.0 Definitions & Process Terminology
4.1 APC: Automated Pressure Controller. Controls conductance to chamber to allow fine-tuned
pressure control during process.
4.2 ASE: Advanced Silicon Etch. Switched gas process.
4.3 SR: Standard Rate (etch rate, that is. 1.5kW power supply)
4.4 Batch: controls the sequence of substrates and process recipe modules to be run.
4.5 Process Recipe: controls what process parameters will be run during a process in the chamber. 4.6 DRIE: Deep Reactive Ion Etching
4.7 ICP: Inductively Coupled Plasma
reactive materials studies4.8 TD ESC: Thick Dielectric Electro Static Chuck. This chuck is capable of withstanding a special 1-3
minute O2 clean recipe with no wafer present. However, do not attempt to clean chuck with other recipes or run other recipes with no wafer on chuck.
4.9 SOI: Silicon On Insulator.
4.10 He Leak Check: During a process system will perform a leak check of backside He past the
substrate. This is an indication of how well clamped is the substrate. 20-30mT/min indicates a
good seal. 40-80mT/min indicates a subpar seal. >100mT/min will result in an alarm.
4.11 Platen Chiller: Substrates are cooled with DI water from a chiller. Standard chiller temperature in
recipes is 25C.
4.12 Parameter Ramping: STS recipes allow option of ramping parameters from a start value to an end
value. The step size of the ramp per cycle is automatically determined by the recipe duration.
Parameter ramping is a higher order means of controlling etch performance. It is recommended that only advanced users use parameter ramping in their recipes.
4.13 Bull’s eye effect: phenomenon by which edges of wafer etch faster than central regions.
4.14 Micro loading: phenomenon by which isolated features etch faster than those located in a dense
array.
4.15 Aspect Raitio Dependent Etch (ARDE): The occurrence of smaller features etching slower than
those with larger dimensions.
4.16 Power Distribution: The prime power distribution panel are located inside the service chase.
Unless there is an emergency situation, the circuit breaker switches should be left in the ON
position (the default state) at all times.
4.17 Reflected Power: The power that is not being transferred to the load from the source (can take the
form of heat). Ideally, the reflected power should be zero during a process, but may spike
momentarily before the matchbox properly tunes the source to the load.
4.18 Matchbox: Unit that contains a servo motor driven array of capacitors. This array adjusts
automatically to maximize the power transfer from the source (power supply) to the load (plasma), ideally resulting in zero reflected power. The STS2 contains two matchboxes; one for the platen power (bias), and one for the coil power.
4.19 Automatching: The process by which reflected power is automatically reduced to zero by means
of a matchbox.
4.20 Peak to Peak Voltage: The voltage differential measured between the coil and platen at an instant
in time.
4.21 DC bias voltage:The dc average voltage measured between the coil and platen.
5.0 Safety
5.1 Emergency Stop Button: Red buttons located both at front of load lock module and to the right of
the STS2 computer screen. Both buttons perform the same function – pressing removes power to
the system. Press emergency stop button only in the case of an emergency.
5.2 RF Power: This system, like many other dry etching systems, uses high-power radio-frequency
(RF 13.56 MHz) energy to generate a plasma. Avoid disturbing machine cabling.
5.3 UV Radiation: Ultraviolet light is generated in the etch chamber during normal operation. It is not
recommended to physically view the inside of the chamber.
6.0 Process Data
7.0 Available Processes, Gases, Process Notes
7.1 Backside Cleanliness
7.1.1 Sts2 uses an electrostatic chuck to clamp your 6 inch silicon wafer. The following
restrictions apply to all wafers
7.1.1.1 Do not use wafers with minor flats
7.1.1.2 Check your wafer backside using the green particle inspection light to the
right of the sts-oxide. Do not place dirty wafers in sts2.
7.1.1.3 Do not apply positive resist to the backside of your wafers – it can stick to the
ESC
7.1.1.4 Do not load wafers with patterned backsides. Staff approval is required for any
backside pattern – almost all will fail a leak up test.
7.2 Recipe Development
7.2.1 Qualified lab members may modify cycle count and total time of a given recipe, as well as
platen and coil match presets. Specialized review of a member’s process is required
before giving permission to modify other values.
7.2.2 Etch rate should be determined in units of nm/Cycle and cycle time. Microns per min is
an inaccurate measure of the etch rate and can lead to misunderstanding of the
granularity of an etch step.
7.2.3 When setting load and tune capacitors, run a test wafer and note the capacitor position
percentages, then change the coil and platen load presets to the known value -5, and the
tune to the known value +5.
7.3 Recipe DEEP SILICON 1 Parameters Along with Typical Results
7.4 SEM Cross section of 20 micron lines and spaces and 2 micron lines after 100 cycles of DEEP
SILICON 1. DEEP SILICON 1 was developed for anisotropic etches up to 300 microns deep.
DEEP SILICON 1
Parameters Passivation Etch Cycle Times (sec) 7 10 C4F8 Flow (sccm) 80 0 SF6 Flow (sccm) 0 130
O2 Flow (sccm) 0 13 Coil Power (W) 600 600 Bias Power (W) 0 20 Bias Frequency (MHz) - 13.56 Platen Chiller ( C) 25 25
Deep Silicon 1
Typical Results
Etch Rate (nm/cycle) ~750 Total Cycle Time (sec) 17 Selectivity to SPR-220 70:1 Uniformity, 6in (%)    2 Profile(degree) 90+/-1

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