专利名称：VARIABLE LENGTH ARITHMETIC UNIT 申请号：JP5894772
申请日：19720612
公开号：JPS5547416B1
公开日：
19801129
专利内容由知识产权出版社提供
摘要：An arithmetic unit in which a plurality of arithmetic and logic functions are performed using either one or both of two inputs X and Y, each input providing a variable number of bits in parallel. The output may be any one of a number of functions, such as the arithmetic functions of X + Y and X - Y, and the logical functions X.Y, X + Y, X (+) Y, X, and Y, etc. All of the functions are generated by the unit and any of the functions may be selected and operate as a data source. The arithmetic unit can operate either in a straight binary or a binary-coded decimal mode. The number of bits in the output for the arithmetic functions is variable and the carry or borrow is generated for each order and is therefore available from the highest order according to the selected length.
字符串函数的length属性更多信息请下载全文后查看

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